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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=sparc | FileCheck %s3; RUN: llc < %s -mtriple=sparcv9 | FileCheck %s -check-prefix=CHECK644 5define i32 @test(i32 %a) nounwind {6; CHECK-LABEL: test:7; CHECK: ! %bb.0: ! %entry8; CHECK-NEXT: andcc %o0, 1, %g09; CHECK-NEXT: bne .LBB0_210; CHECK-NEXT: nop11; CHECK-NEXT: ! %bb.1: ! %if.end12; CHECK-NEXT: retl13; CHECK-NEXT: mov 2, %o014; CHECK-NEXT: .LBB0_2: ! %if.then15; CHECK-NEXT: retl16; CHECK-NEXT: mov 1, %o017;18; CHECK64-LABEL: test:19; CHECK64: ! %bb.0: ! %entry20; CHECK64-NEXT: andcc %o0, 1, %g021; CHECK64-NEXT: bne %icc, .LBB0_222; CHECK64-NEXT: nop23; CHECK64-NEXT: ! %bb.1: ! %if.end24; CHECK64-NEXT: retl25; CHECK64-NEXT: mov 2, %o026; CHECK64-NEXT: .LBB0_2: ! %if.then27; CHECK64-NEXT: retl28; CHECK64-NEXT: mov 1, %o029entry:30 %and = and i32 %a, 131 %tobool = icmp eq i32 %and, 032 br i1 %tobool, label %if.end, label %if.then33 34if.then:35 ret i32 136 37if.end:38 ret i32 239}40 41; Same as above, with select.42define i32 @test_select(i32 %a) nounwind {43; CHECK-LABEL: test_select:44; CHECK: ! %bb.0:45; CHECK-NEXT: andcc %o0, 1, %g046; CHECK-NEXT: be .LBB1_247; CHECK-NEXT: nop48; CHECK-NEXT: ! %bb.1:49; CHECK-NEXT: retl50; CHECK-NEXT: mov 2, %o051; CHECK-NEXT: .LBB1_2:52; CHECK-NEXT: retl53; CHECK-NEXT: mov 1, %o054;55; CHECK64-LABEL: test_select:56; CHECK64: ! %bb.0:57; CHECK64-NEXT: andcc %o0, 1, %g058; CHECK64-NEXT: mov 2, %o059; CHECK64-NEXT: retl60; CHECK64-NEXT: move %icc, 1, %o061 %and = and i32 %a, 162 %tobool = icmp eq i32 %and, 063 %ret = select i1 %tobool, i32 1, i32 264 ret i32 %ret65}66 67 68; No instruction can be changed to set ICC69define i32 @no_candidate(i32 %a) nounwind {70; CHECK-LABEL: no_candidate:71; CHECK: ! %bb.0: ! %entry72; CHECK-NEXT: cmp %o0, 073; CHECK-NEXT: be .LBB2_274; CHECK-NEXT: nop75; CHECK-NEXT: ! %bb.1: ! %if.then76; CHECK-NEXT: retl77; CHECK-NEXT: mov 1, %o078; CHECK-NEXT: .LBB2_2: ! %if.end79; CHECK-NEXT: retl80; CHECK-NEXT: mov 2, %o081;82; CHECK64-LABEL: no_candidate:83; CHECK64: ! %bb.0: ! %entry84; CHECK64-NEXT: cmp %o0, 085; CHECK64-NEXT: be %icc, .LBB2_286; CHECK64-NEXT: nop87; CHECK64-NEXT: ! %bb.1: ! %if.then88; CHECK64-NEXT: retl89; CHECK64-NEXT: mov 1, %o090; CHECK64-NEXT: .LBB2_2: ! %if.end91; CHECK64-NEXT: retl92; CHECK64-NEXT: mov 2, %o093entry:94 %tobool = icmp eq i32 %a, 095 br i1 %tobool, label %if.end, label %if.then96 97if.then:98 ret i32 199 100if.end:101 ret i32 2102}103 104; Defining instruction and compare not in same block105define i32 @not_same_block(i32 %a) nounwind {106; CHECK-LABEL: not_same_block:107; CHECK: ! %bb.0: ! %entry108; CHECK-NEXT: and %o0, 1, %o0109; CHECK-NEXT: .LBB3_1: ! %if.then110; CHECK-NEXT: ! =>This Inner Loop Header: Depth=1111; CHECK-NEXT: cmp %o0, 0112; CHECK-NEXT: bne .LBB3_1113; CHECK-NEXT: nop114; CHECK-NEXT: ! %bb.2: ! %if.end115; CHECK-NEXT: retl116; CHECK-NEXT: mov 2, %o0117;118; CHECK64-LABEL: not_same_block:119; CHECK64: ! %bb.0: ! %entry120; CHECK64-NEXT: and %o0, 1, %o0121; CHECK64-NEXT: .LBB3_1: ! %if.then122; CHECK64-NEXT: ! =>This Inner Loop Header: Depth=1123; CHECK64-NEXT: cmp %o0, 0124; CHECK64-NEXT: bne %icc, .LBB3_1125; CHECK64-NEXT: nop126; CHECK64-NEXT: ! %bb.2: ! %if.end127; CHECK64-NEXT: retl128; CHECK64-NEXT: mov 2, %o0129entry:130 %and = and i32 %a, 1131 br label %if.then132 133if.then:134 %tobool = icmp eq i32 %and, 0135 br i1 %tobool, label %if.end, label %if.then136 ret i32 1137 138if.end:139 ret i32 2140}141 142; Compare instruction is not checking equality143define i32 @not_equality(i32 %a) nounwind {144; CHECK-LABEL: not_equality:145; CHECK: ! %bb.0: ! %entry146; CHECK-NEXT: and %o0, 1, %o1147; CHECK-NEXT: cmp %o1, 0148; CHECK-NEXT: bl .LBB4_2149; CHECK-NEXT: nop150; CHECK-NEXT: ! %bb.1: ! %entry151; CHECK-NEXT: mov %o1, %o0152; CHECK-NEXT: .LBB4_2: ! %entry153; CHECK-NEXT: retl154; CHECK-NEXT: nop155;156; CHECK64-LABEL: not_equality:157; CHECK64: ! %bb.0: ! %entry158; CHECK64-NEXT: and %o0, 1, %o1159; CHECK64-NEXT: cmp %o1, 0160; CHECK64-NEXT: movl %icc, %o0, %o1161; CHECK64-NEXT: retl162; CHECK64-NEXT: mov %o1, %o0163entry:164 %and = and i32 %a, 1165 %cmp = icmp slt i32 %and, 0166 %cond = select i1 %cmp, i32 %a, i32 %and167 ret i32 %cond168}169 170; Instruction that modifies ICC (call) between defining171; and compare instruction.172define i32 @call_between(i32 %a) nounwind {173; CHECK-LABEL: call_between:174; CHECK: ! %bb.0: ! %entry175; CHECK-NEXT: save %sp, -96, %sp176; CHECK-NEXT: and %i0, 1, %i1177; CHECK-NEXT: call not_equality178; CHECK-NEXT: mov %i1, %o0179; CHECK-NEXT: cmp %i1, 0180; CHECK-NEXT: be .LBB5_2181; CHECK-NEXT: nop182; CHECK-NEXT: ! %bb.1: ! %entry183; CHECK-NEXT: mov %i1, %i0184; CHECK-NEXT: .LBB5_2: ! %entry185; CHECK-NEXT: ret186; CHECK-NEXT: restore187;188; CHECK64-LABEL: call_between:189; CHECK64: ! %bb.0: ! %entry190; CHECK64-NEXT: save %sp, -176, %sp191; CHECK64-NEXT: and %i0, 1, %i1192; CHECK64-NEXT: call not_equality193; CHECK64-NEXT: mov %i1, %o0194; CHECK64-NEXT: cmp %i1, 0195; CHECK64-NEXT: move %icc, %i0, %i1196; CHECK64-NEXT: ret197; CHECK64-NEXT: restore %g0, %i1, %o0198entry:199 %and = and i32 %a, 1200 call i32 @not_equality(i32 %and)201 %cmp = icmp eq i32 %and, 0202 %cond = select i1 %cmp, i32 %a, i32 %and203 ret i32 %cond204}205 206; ICC is used in successor block.207define i32 @icc_live_out(i32 %a) nounwind {208; CHECK-LABEL: icc_live_out:209; CHECK: ! %bb.0: ! %entry210; CHECK-NEXT: andcc %o0, 1, %o1211; CHECK-NEXT: bne .LBB6_4212; CHECK-NEXT: nop213; CHECK-NEXT: ! %bb.1: ! %case1214; CHECK-NEXT: cmp %o1, 0215; CHECK-NEXT: be .LBB6_3216; CHECK-NEXT: nop217; CHECK-NEXT: ! %bb.2: ! %case1218; CHECK-NEXT: mov %o1, %o0219; CHECK-NEXT: .LBB6_3: ! %case1220; CHECK-NEXT: retl221; CHECK-NEXT: nop222; CHECK-NEXT: .LBB6_4: ! %case2223; CHECK-NEXT: retl224; CHECK-NEXT: mov 2, %o0225;226; CHECK64-LABEL: icc_live_out:227; CHECK64: ! %bb.0: ! %entry228; CHECK64-NEXT: mov %o0, %o1229; CHECK64-NEXT: andcc %o0, 1, %o0230; CHECK64-NEXT: bne %icc, .LBB6_2231; CHECK64-NEXT: nop232; CHECK64-NEXT: ! %bb.1: ! %case1233; CHECK64-NEXT: cmp %o0, 0234; CHECK64-NEXT: retl235; CHECK64-NEXT: move %icc, %o1, %o0236; CHECK64-NEXT: .LBB6_2: ! %case2237; CHECK64-NEXT: retl238; CHECK64-NEXT: mov 2, %o0239entry:240 %and = and i32 %a, 1241 %cmp = icmp eq i32 %and, 0242 br i1 %cmp, label %case1, label %case2243case1:244 %cond = select i1 %cmp, i32 %a, i32 %and245 ret i32 %cond246case2:247 ret i32 2248}249