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1; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s2; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}3 4; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s5; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o - -filetype=obj | spirv-val %}6 7; CHECK-DAG: %[[#Int:]] = OpTypeInt 32 08; CHECK-DAG: %[[#Scope_CrossDevice:]] = OpConstantNull %[[#Int]]9; CHECK-DAG: %[[#MemSem_Acquire:]] = OpConstant %[[#Int]] 210; CHECK-DAG: %[[#MemSem_Release:]] = OpConstant %[[#Int]] 4{{$}}11; CHECK-DAG: %[[#MemSem_AcquireRelease:]] = OpConstant %[[#Int]] 812; CHECK-DAG: %[[#MemSem_SequentiallyConsistent:]] = OpConstant %[[#Int]] 1613; CHECK-DAG: %[[#Value:]] = OpConstant %[[#Int]] 4214; CHECK-DAG: %[[#Float:]] = OpTypeFloat 3215; CHECK-DAG: %[[#PointerType:]] = OpTypePointer CrossWorkgroup %[[#Int]]16; CHECK-DAG: %[[#FPPointerType:]] = OpTypePointer CrossWorkgroup %[[#Float]]17; CHECK-DAG: %[[#Pointer:]] = OpVariable %[[#PointerType]] CrossWorkgroup18; CHECK-DAG: %[[#FPPointer:]] = OpVariable %[[#FPPointerType]] CrossWorkgroup19; CHECK-DAG: %[[#FPValue:]] = OpConstant %[[#Float]] 4220 21@ui = common dso_local addrspace(1) global i32 0, align 422@f = common dso_local local_unnamed_addr addrspace(1) global float 0.000000e+00, align 423 24define dso_local spir_func void @test_atomicrmw() local_unnamed_addr {25entry:26 %0 = atomicrmw xchg i32 addrspace(1)* @ui, i32 42 acq_rel27; CHECK: %[[#]] = OpAtomicExchange %[[#Int]] %[[#Pointer]] %[[#Scope_CrossDevice]] %[[#MemSem_AcquireRelease]] %[[#Value]]28 29 %1 = atomicrmw xchg float addrspace(1)* @f, float 42.000000e+00 seq_cst30; CHECK: %[[#]] = OpAtomicExchange %[[#Float]] %[[#FPPointer]] %[[#Scope_CrossDevice]] %[[#MemSem_SequentiallyConsistent]] %[[#FPValue]]31 32 %2 = atomicrmw add i32 addrspace(1)* @ui, i32 42 monotonic33; CHECK: %[[#]] = OpAtomicIAdd %[[#Int]] %[[#Pointer]] %[[#Scope_CrossDevice]] %{{.+}} %[[#Value]]34 35 %3 = atomicrmw sub i32 addrspace(1)* @ui, i32 42 acquire36; CHECK: %[[#]] = OpAtomicISub %[[#Int]] %[[#Pointer]] %[[#Scope_CrossDevice]] %[[#MemSem_Acquire]] %[[#Value]]37 38 %4 = atomicrmw or i32 addrspace(1)* @ui, i32 42 release39; CHECK: %[[#]] = OpAtomicOr %[[#Int]] %[[#Pointer]] %[[#Scope_CrossDevice]] %[[#MemSem_Release]] %[[#Value]]40 41 %5 = atomicrmw xor i32 addrspace(1)* @ui, i32 42 acq_rel42; CHECK: %[[#]] = OpAtomicXor %[[#Int]] %[[#Pointer]] %[[#Scope_CrossDevice]] %[[#MemSem_AcquireRelease]] %[[#Value]]43 44 %6 = atomicrmw and i32 addrspace(1)* @ui, i32 42 seq_cst45; CHECK: %[[#]] = OpAtomicAnd %[[#Int]] %[[#Pointer]] %[[#Scope_CrossDevice]] %[[#MemSem_SequentiallyConsistent]] %[[#Value]]46 47 %7 = atomicrmw max i32 addrspace(1)* @ui, i32 42 monotonic48; CHECK: %[[#]] = OpAtomicSMax %[[#Int]] %[[#Pointer]] %[[#Scope_CrossDevice]] %{{.*}} %[[#Value]]49 50 %8 = atomicrmw min i32 addrspace(1)* @ui, i32 42 acquire51; CHECK: %[[#]] = OpAtomicSMin %[[#Int]] %[[#Pointer]] %[[#Scope_CrossDevice]] %[[#MemSem_Acquire]] %[[#Value]]52 53 %9 = atomicrmw umax i32 addrspace(1)* @ui, i32 42 release54; CHECK: %[[#]] = OpAtomicUMax %[[#Int]] %[[#Pointer]] %[[#Scope_CrossDevice]] %[[#MemSem_Release]] %[[#Value]]55 56 %10 = atomicrmw umin i32 addrspace(1)* @ui, i32 42 acq_rel57; CHECK: %[[#]] = OpAtomicUMin %[[#Int]] %[[#Pointer]] %[[#Scope_CrossDevice]] %[[#MemSem_AcquireRelease]] %[[#Value]]58 59 ret void60}61