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1; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV2; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}3 4; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV5; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o - -filetype=obj | spirv-val %}6 7define i32 @test_switch_branches(i32 %a) {8entry:9 %alloc = alloca i3210; CHECK-SPIRV: OpSwitch %[[#]] %[[#DEFAULT:]] 1 %[[#CASE1:]] 2 %[[#CASE2:]] 3 %[[#CASE3:]]11 switch i32 %a, label %default [12 i32 1, label %case113 i32 2, label %case214 i32 3, label %case315 ]16 17case1:18 store i32 1, ptr %alloc19 br label %end20 21case2:22 store i32 2, ptr %alloc23 br label %end24 25case3:26 store i32 3, ptr %alloc27 br label %end28 29default:30 store i32 0, ptr %alloc31 br label %end32 33end:34 %result = load i32, ptr %alloc35 ret i32 %result36 37; CHECK-SPIRV: %[[#CASE3]] = OpLabel38; CHECK-SPIRV: OpBranch %[[#END:]]39 40; CHECK-SPIRV: %[[#CASE2]] = OpLabel41; CHECK-SPIRV: OpBranch %[[#END]]42 43; CHECK-SPIRV: %[[#CASE1]] = OpLabel44; CHECK-SPIRV: OpBranch %[[#END]]45 46; CHECK-SPIRV: %[[#DEFAULT]] = OpLabel47; CHECK-SPIRV: OpBranch %[[#END]]48 49; CHECK-SPIRV: %[[#END]] = OpLabel50; CHECK-SPIRV: OpReturnValue51}52