73 lines · plain
1; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv1.6-unknown-vulkan1.3-compute %s -o - | FileCheck %s2; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv1.6-unknown-vulkan1.3-compute %s -o - -filetype=obj | spirv-val --target-env vulkan1.3 %}3 4; CHECK-DAG: OpDecorate [[bool_const:%[0-9]+]] SpecId 15; CHECK-DAG: OpDecorate [[short_const:%[0-9]+]] SpecId 26; CHECK-DAG: OpDecorate [[int_const:%[0-9]+]] SpecId 37; CHECK-DAG: OpDecorate [[long_const:%[0-9]+]] SpecId 48; CHECK-DAG: OpDecorate [[float_const:%[0-9]+]] SpecId 89; CHECK-DAG: OpDecorate [[double_const:%[0-9]+]] SpecId 910; CHECK-DAG: OpDecorate [[enum_const:%[0-9]+]] SpecId 1011 12; CHECK-DAG: [[bool_const]] = OpSpecConstantTrue {{%[0-9]+}}13; CHECK-DAG: [[short_const]] = OpSpecConstant {{%[0-9]+}} 414; CHECK-DAG: [[int_const]] = OpSpecConstant {{%[0-9]+}} 515; CHECK-DAG: [[long_const]] = OpSpecConstant {{%[0-9]+}} 816; CHECK-DAG: [[float_const]] = OpSpecConstant {{%[0-9]+}} 111201484817; CHECK-DAG: [[double_const]] = OpSpecConstant {{%[0-9]+}} 0 107957452818; CHECK-DAG: [[enum_const]] = OpSpecConstant {{%[0-9]+}} 3019 20@_ZL10bool_const = internal addrspace(10) global i32 0, align 421@_ZL11short_const = internal addrspace(10) global i16 0, align 222@_ZL9int_const = internal addrspace(10) global i32 0, align 423@_ZL10long_const = internal addrspace(10) global i64 0, align 824@_ZL11float_const = internal addrspace(10) global float 0.000000e+00, align 425@_ZL12double_const = internal addrspace(10) global double 0.000000e+00, align 826@_ZL10enum_const = internal addrspace(10) global i32 0, align 427 28; Function Attrs: mustprogress nofree noinline norecurse nosync nounwind willreturn memory(readwrite, argmem: none, inaccessiblemem: none)29define void @main() local_unnamed_addr #0 {30entry:31 ; CHECK: [[b:%[0-9]+]] = OpSelect {{%[0-9]+}} [[bool_const]]32 ; CHECK: OpStore {{%[0-9]+}} [[b]]33 %0 = tail call spir_func i1 @_Z20__spirv_SpecConstantib(i32 1, i1 true)34 %storedv.i.i = zext i1 %0 to i3235 store i32 %storedv.i.i, ptr addrspace(10) @_ZL10bool_const, align 436 37 ; CHECK: OpStore {{%[0-9]+}} [[short_const]]38 %2 = tail call spir_func i16 @_Z20__spirv_SpecConstantis(i32 2, i16 4)39 store i16 %2, ptr addrspace(10) @_ZL11short_const, align 240 41 ; CHECK: OpStore {{%[0-9]+}} [[int_const]]42 %4 = tail call spir_func i32 @_Z20__spirv_SpecConstantii(i32 3, i32 5)43 store i32 %4, ptr addrspace(10) @_ZL9int_const, align 444 45 46 ; CHECK: OpStore {{%[0-9]+}} [[long_const]]47 %6 = tail call spir_func i64 @_Z20__spirv_SpecConstantix(i32 4, i64 8)48 store i64 %6, ptr addrspace(10) @_ZL10long_const, align 849 50 ; CHECK: OpStore {{%[0-9]+}} [[float_const]]51 %14 = tail call reassoc nnan ninf nsz arcp afn spir_func float @_Z20__spirv_SpecConstantif(i32 8, float 5.000000e+01)52 store float %14, ptr addrspace(10) @_ZL11float_const, align 453 54 ; CHECK: OpStore {{%[0-9]+}} [[double_const]]55 %16 = tail call reassoc nnan ninf nsz arcp afn spir_func double @_Z20__spirv_SpecConstantid(i32 9, double 1.000000e+02)56 store double %16, ptr addrspace(10) @_ZL12double_const, align 857 58 ; CHECK: OpStore {{%[0-9]+}} [[enum_const]]59 %18 = tail call spir_func i32 @_Z20__spirv_SpecConstantii(i32 10, i32 30)60 store i32 %18, ptr addrspace(10) @_ZL10enum_const, align 461 ret void62}63 64 65declare i1 @_Z20__spirv_SpecConstantib(i32, i1)66declare i8 @_Z20__spirv_SpecConstantia(i32, i8)67declare i16 @_Z20__spirv_SpecConstantis(i32, i16)68declare i32 @_Z20__spirv_SpecConstantii(i32, i32)69declare i64 @_Z20__spirv_SpecConstantix(i32, i64)70declare float @_Z20__spirv_SpecConstantif(i32, float)71declare double @_Z20__spirv_SpecConstantid(i32, double)72 73attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" }