89 lines · plain
1; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-vulkan %s -o - | FileCheck %s2; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-vulkan %s -o - -filetype=obj | spirv-val %}3 4; Code here is an excerpt of clang/test/CodeGenHLSL/builtins/AddUint64.hlsl compiled for spirv using the following command5; clang -cc1 -finclude-default-header -triple spirv-unknown-vulkan-compute clang/test/CodeGenHLSL/builtins/AddUint64.hlsl -emit-llvm -disable-llvm-passes -o llvm/test/CodeGen/SPIRV/hlsl-intrinsics/uadd_with_overflow.ll6 7; CHECK-DAG: %[[#int_32:]] = OpTypeInt 32 08; CHECK-DAG: %[[#vec2_int_32:]] = OpTypeVector %[[#int_32]] 29; CHECK-DAG: %[[#bool:]] = OpTypeBool10; CHECK-DAG: %[[#const_i32_1:]] = OpConstant %[[#int_32]] 1{{$}}11; CHECK-DAG: %[[#struct_i32_i32:]] = OpTypeStruct %[[#int_32]] %[[#int_32]]12; CHECK-DAG: %[[#func_v2i32_v2i32_v2i32:]] = OpTypeFunction %[[#vec2_int_32]] %[[#vec2_int_32]] %[[#vec2_int_32]]13; CHECK-DAG: %[[#const_i32_0:]] = OpConstant %[[#int_32]] 0{{$}}14; CHECK-DAG: %[[#undef_v2i32:]] = OpUndef %[[#vec2_int_32]]15; CHECK-DAG: %[[#vec4_int_32:]] = OpTypeVector %[[#int_32]] 416; CHECK-DAG: %[[#vec2_bool:]] = OpTypeVector %[[#bool]] 217; CHECK-DAG: %[[#const_v2i32_0_0:]] = OpConstantComposite %[[#vec2_int_32]] %[[#const_i32_0]] %[[#const_i32_0]]18; CHECK-DAG: %[[#const_v2i32_1_1:]] = OpConstantComposite %[[#vec2_int_32]] %[[#const_i32_1]] %[[#const_i32_1]]19; CHECK-DAG: %[[#struct_v2i32_v2i32:]] = OpTypeStruct %[[#vec2_int_32]] %[[#vec2_int_32]]20; CHECK-DAG: %[[#func_v4i32_v4i32_v4i32:]] = OpTypeFunction %[[#vec4_int_32]] %[[#vec4_int_32]] %[[#vec4_int_32]]21; CHECK-DAG: %[[#undef_v4i32:]] = OpUndef %[[#vec4_int_32]]22 23 24define spir_func <2 x i32> @test_AddUint64_uint2(<2 x i32> %a, <2 x i32> %b) {25entry:26; CHECK: %[[#a:]] = OpFunctionParameter %[[#vec2_int_32]]27; CHECK: %[[#b:]] = OpFunctionParameter %[[#vec2_int_32]]28; CHECK: %[[#a_low:]] = OpCompositeExtract %[[#int_32]] %[[#a]] 029; CHECK: %[[#a_high:]] = OpCompositeExtract %[[#int_32]] %[[#a]] 130; CHECK: %[[#b_low:]] = OpCompositeExtract %[[#int_32]] %[[#b]] 031; CHECK: %[[#b_high:]] = OpCompositeExtract %[[#int_32]] %[[#b]] 132; CHECK: %[[#iaddcarry:]] = OpIAddCarry %[[#struct_i32_i32]] %[[#a_low]] %[[#b_low]]33; CHECK: %[[#lowsum:]] = OpCompositeExtract %[[#int_32]] %[[#iaddcarry]] 034; CHECK: %[[#carry:]] = OpCompositeExtract %[[#int_32]] %[[#iaddcarry]] 135; CHECK: %[[#carry_ne0:]] = OpINotEqual %[[#bool]] %[[#carry]] %[[#const_i32_0]]36; CHECK: %[[#select_1_or_0:]] = OpSelect %[[#int_32]] %[[#carry_ne0]] %[[#const_i32_1]] %[[#const_i32_0]]37; CHECK: %[[#highsum:]] = OpIAdd %[[#int_32]] %[[#a_high]] %[[#b_high]]38; CHECK: %[[#highsumpluscarry:]] = OpIAdd %[[#int_32]] %[[#highsum]] %[[#select_1_or_0]]39; CHECK: %[[#adduint64_upto0:]] = OpCompositeInsert %[[#vec2_int_32]] %[[#lowsum]] %[[#undef_v2i32]] 040; CHECK: %[[#adduint64:]] = OpCompositeInsert %[[#vec2_int_32]] %[[#highsumpluscarry]] %[[#adduint64_upto0]] 141; CHECK: OpReturnValue %[[#adduint64]]42;43 %LowA = extractelement <2 x i32> %a, i64 044 %HighA = extractelement <2 x i32> %a, i64 145 %LowB = extractelement <2 x i32> %b, i64 046 %HighB = extractelement <2 x i32> %b, i64 147 %3 = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %LowA, i32 %LowB)48 %4 = extractvalue { i32, i1 } %3, 149 %5 = extractvalue { i32, i1 } %3, 050 %CarryZExt = zext i1 %4 to i3251 %HighSum = add i32 %HighA, %HighB52 %HighSumPlusCarry = add i32 %HighSum, %CarryZExt53 %hlsl.AddUint64.upto0 = insertelement <2 x i32> poison, i32 %5, i64 054 %hlsl.AddUint64 = insertelement <2 x i32> %hlsl.AddUint64.upto0, i32 %HighSumPlusCarry, i64 155 ret <2 x i32> %hlsl.AddUint6456}57 58define spir_func <4 x i32> @test_AddUint64_uint4(<4 x i32> %a, <4 x i32> %b) #0 {59entry:60; CHECK: %[[#a:]] = OpFunctionParameter %[[#vec4_int_32]]61; CHECK: %[[#b:]] = OpFunctionParameter %[[#vec4_int_32]]62; CHECK: %[[#a_low:]] = OpVectorShuffle %[[#vec2_int_32]] %[[#a]] %[[#undef_v4i32]] 0 263; CHECK: %[[#a_high:]] = OpVectorShuffle %[[#vec2_int_32]] %[[#a]] %[[#undef_v4i32]] 1 364; CHECK: %[[#b_low:]] = OpVectorShuffle %[[#vec2_int_32]] %[[#b]] %[[#undef_v4i32]] 0 265; CHECK: %[[#b_high:]] = OpVectorShuffle %[[#vec2_int_32]] %[[#b]] %[[#undef_v4i32]] 1 366; CHECK: %[[#iaddcarry:]] = OpIAddCarry %[[#struct_v2i32_v2i32]] %[[#a_low]] %[[#b_low]]67; CHECK: %[[#lowsum:]] = OpCompositeExtract %[[#vec2_int_32]] %[[#iaddcarry]] 068; CHECK: %[[#carry:]] = OpCompositeExtract %[[#vec2_int_32]] %[[#iaddcarry]] 169; CHECK: %[[#carry_ne0:]] = OpINotEqual %[[#vec2_bool]] %[[#carry]] %[[#const_v2i32_0_0]]70; CHECK: %[[#select_1_or_0:]] = OpSelect %[[#vec2_int_32]] %[[#carry_ne0]] %[[#const_v2i32_1_1]] %[[#const_v2i32_0_0]]71; CHECK: %[[#highsum:]] = OpIAdd %[[#vec2_int_32]] %[[#a_high]] %[[#b_high]]72; CHECK: %[[#highsumpluscarry:]] = OpIAdd %[[#vec2_int_32]] %[[#highsum]] %[[#select_1_or_0]]73; CHECK: %[[#adduint64:]] = OpVectorShuffle %[[#vec4_int_32]] %[[#lowsum]] %[[#highsumpluscarry]] 0 2 1 374; CHECK: OpReturnValue %[[#adduint64]]75;76 %LowA = shufflevector <4 x i32> %a, <4 x i32> poison, <2 x i32> <i32 0, i32 2>77 %HighA = shufflevector <4 x i32> %a, <4 x i32> poison, <2 x i32> <i32 1, i32 3>78 %LowB = shufflevector <4 x i32> %b, <4 x i32> poison, <2 x i32> <i32 0, i32 2>79 %HighB = shufflevector <4 x i32> %b, <4 x i32> poison, <2 x i32> <i32 1, i32 3>80 %3 = call { <2 x i32>, <2 x i1> } @llvm.uadd.with.overflow.v2i32(<2 x i32> %LowA, <2 x i32> %LowB)81 %4 = extractvalue { <2 x i32>, <2 x i1> } %3, 182 %5 = extractvalue { <2 x i32>, <2 x i1> } %3, 083 %CarryZExt = zext <2 x i1> %4 to <2 x i32>84 %HighSum = add <2 x i32> %HighA, %HighB85 %HighSumPlusCarry = add <2 x i32> %HighSum, %CarryZExt86 %hlsl.AddUint64 = shufflevector <2 x i32> %5, <2 x i32> %HighSumPlusCarry, <4 x i32> <i32 0, i32 2, i32 1, i32 3>87 ret <4 x i32> %hlsl.AddUint6488}89