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1; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv1.5-unknown-vulkan %s -o - | FileCheck %s --check-prefixes=CHECK,SPIRV152; RUN: llc -verify-machineinstrs -spirv-ext=+SPV_EXT_demote_to_helper_invocation -O0 -mtriple=spirv1.5-unknown-vulkan %s -o - | FileCheck %s --check-prefixes=CHECK,SPIRV16,WITH-EXTENSION,WITH-CAPABILITY3; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv1.6-unknown-vulkan %s -o - | FileCheck %s --check-prefixes=CHECK,SPIRV16,WITH-CAPABILITY4; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv1.5-unknown-vulkan %s -o - -filetype=obj | spirv-val %}5; RUN: %if spirv-tools %{ llc -O0 -spirv-ext=+SPV_EXT_demote_to_helper_invocation -mtriple=spirv1.5-unknown-vulkan %s -o - -filetype=obj | spirv-val %}6; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv1.6-unknown-vulkan %s -o - -filetype=obj | spirv-val %}7 8 9; Make sure lowering is correctly generating spirv code.10 11; WITH-CAPABILITY-DAG: OpCapability DemoteToHelperInvocation12; WITH-EXTENSION-DAG: OpExtension "SPV_EXT_demote_to_helper_invocation"13 14; CHECK-DAG: %[[#float:]] = OpTypeFloat 3215; CHECK-DAG: %[[#void:]] = OpTypeVoid16; CHECK-DAG: %[[#bool:]] = OpTypeBool17; CHECK-DAG: %[[#v4bool:]] = OpTypeVector %[[#bool]] 418; CHECK-DAG: %[[#v4float:]] = OpTypeVector %[[#float]] 419; CHECK-DAG: %[[#fzero:]] = OpConstant %[[#float]] 020; CHECK-DAG: %[[#v4fzero:]] = OpConstantNull %[[#v4float]]21 22define void @test_scalar(float noundef %Buf) {23entry:24; CHECK-LABEL: ; -- Begin function test_scalar25; CHECK: %[[#load:]] = OpFunctionParameter %[[#float]]26; CHECK: %[[#cmplt:]] = OpFOrdLessThan %[[#bool]] %[[#load]] %[[#fzero]]27; CHECK: OpBranchConditional %[[#cmplt]] %[[#truel:]] %[[#endl:]]28; CHECK: %[[#truel]] = OpLabel29; SPIRV15: OpKill30; SPIRV16-NO: OpKill31; SPIRV15-NO: OpBranch %[[#endl]]32; SPIRV16: OpDemoteToHelperInvocation33; SPIRV16: OpBranch %[[#endl]]34; CHECK: %[[#endl]] = OpLabel35 %Buf.addr = alloca float, align 436 store float %Buf, ptr %Buf.addr, align 437 %1 = load float, ptr %Buf.addr, align 438 %2 = fcmp olt float %1, 0.000000e+0039 br i1 %2, label %lt0, label %end40 41lt0: ; preds = %entry42 call void @llvm.spv.discard()43 br label %end44 45end: ; preds = %lt0, %entry46 ret void47}48declare void @llvm.spv.discard()49 50define void @test_vector(<4 x float> noundef %Buf) {51entry:52; CHECK-LABEL: ; -- Begin function test_vector53; CHECK: %[[#loadvec:]] = OpFunctionParameter %[[#v4float]]54; CHECK: %[[#cmplt:]] = OpFOrdLessThan %[[#v4bool]] %[[#loadvec]] %[[#v4fzero]]55; CHECK: %[[#opany:]] = OpAny %[[#bool]] %[[#cmplt]]56; CHECK: OpBranchConditional %[[#opany]] %[[#truel:]] %[[#endl:]]57; CHECK: %[[#truel]] = OpLabel58; SPIRV15: OpKill59; SPIRV16-NO: OpKill60; SPIRV15-NO: OpBranch %[[#endl]]61; SPIRV16: OpDemoteToHelperInvocation62; SPIRV16: OpBranch %[[#endl]]63; CHECK: %[[#endl]] = OpLabel64 %Buf.addr = alloca <4 x float>, align 1665 store <4 x float> %Buf, ptr %Buf.addr, align 1666 %1 = load <4 x float>, ptr %Buf.addr, align 1667 %2 = fcmp olt <4 x float> %1, zeroinitializer68 %3 = call i1 @llvm.spv.any.v4i1(<4 x i1> %2)69 br i1 %3, label %lt0, label %end70 71lt0: ; preds = %entry72 call void @llvm.spv.discard()73 br label %end74 75end: ; preds = %lt0, %entry76 ret void77}78