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1; RUN: llc -O0 -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s2; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o - -filetype=obj | spirv-val %}3 4; CHECK-DAG: %[[#op_ext_glsl:]] = OpExtInstImport "GLSL.std.450"5 6; CHECK-DAG: %[[#float_16:]] = OpTypeFloat 167; CHECK-DAG: %[[#float_32:]] = OpTypeFloat 328; CHECK-DAG: %[[#float_64:]] = OpTypeFloat 649 10; CHECK-DAG: %[[#int_16:]] = OpTypeInt 1611; CHECK-DAG: %[[#int_32:]] = OpTypeInt 3212; CHECK-DAG: %[[#int_64:]] = OpTypeInt 6413 14; CHECK-DAG: %[[#vec4_float_16:]] = OpTypeVector %[[#float_16]] 415; CHECK-DAG: %[[#vec4_float_32:]] = OpTypeVector %[[#float_32]] 416; CHECK-DAG: %[[#vec4_float_64:]] = OpTypeVector %[[#float_64]] 417 18; CHECK-DAG: %[[#vec4_int_16:]] = OpTypeVector %[[#int_16]] 419; CHECK-DAG: %[[#vec4_int_32:]] = OpTypeVector %[[#int_32]] 420; CHECK-DAG: %[[#vec4_int_64:]] = OpTypeVector %[[#int_64]] 421 22 23define noundef i32 @sign_half(half noundef %a) {24entry:25; CHECK: %[[#float_16_arg:]] = OpFunctionParameter %[[#float_16]]26; CHECK: %[[#fsign:]] = OpExtInst %[[#float_16]] %[[#op_ext_glsl]] FSign %[[#float_16_arg]]27; CHECK: %[[#]] = OpConvertFToS %[[#int_32]] %[[#fsign]]28 %elt.sign = call i32 @llvm.spv.sign.f16(half %a)29 ret i32 %elt.sign30}31 32define noundef i32 @sign_float(float noundef %a) {33entry:34; CHECK: %[[#float_32_arg:]] = OpFunctionParameter %[[#float_32]]35; CHECK: %[[#fsign:]] = OpExtInst %[[#float_32]] %[[#op_ext_glsl]] FSign %[[#float_32_arg]]36; CHECK: %[[#]] = OpConvertFToS %[[#int_32]] %[[#fsign]]37 %elt.sign = call i32 @llvm.spv.sign.f32(float %a)38 ret i32 %elt.sign39}40 41define noundef i32 @sign_double(double noundef %a) {42entry:43; CHECK: %[[#float_64_arg:]] = OpFunctionParameter %[[#float_64]]44; CHECK: %[[#fsign:]] = OpExtInst %[[#float_64]] %[[#op_ext_glsl]] FSign %[[#float_64_arg]]45; CHECK: %[[#]] = OpConvertFToS %[[#int_32]] %[[#fsign]]46 %elt.sign = call i32 @llvm.spv.sign.f64(double %a)47 ret i32 %elt.sign48}49 50define noundef i32 @sign_i16(i16 noundef %a) {51entry:52; CHECK: %[[#int_16_arg:]] = OpFunctionParameter %[[#int_16]]53; CHECK: %[[#ssign:]] = OpExtInst %[[#int_16]] %[[#op_ext_glsl]] SSign %[[#int_16_arg]]54; CHECK: %[[#]] = OpSConvert %[[#int_32]] %[[#ssign]]55 %elt.sign = call i32 @llvm.spv.sign.i16(i16 %a)56 ret i32 %elt.sign57}58 59define noundef i32 @sign_i32(i32 noundef %a) {60entry:61; CHECK: %[[#int_32_arg:]] = OpFunctionParameter %[[#int_32]]62; CHECK: %[[#]] = OpExtInst %[[#int_32]] %[[#op_ext_glsl]] SSign %[[#int_32_arg]]63 %elt.sign = call i32 @llvm.spv.sign.i32(i32 %a)64 ret i32 %elt.sign65}66 67define noundef i32 @sign_i64(i64 noundef %a) {68entry:69; CHECK: %[[#int_64_arg:]] = OpFunctionParameter %[[#int_64]]70; CHECK: %[[#ssign:]] = OpExtInst %[[#int_64]] %[[#op_ext_glsl]] SSign %[[#int_64_arg]]71; CHECK: %[[#]] = OpSConvert %[[#int_32]] %[[#ssign]]72 %elt.sign = call i32 @llvm.spv.sign.i64(i64 %a)73 ret i32 %elt.sign74}75 76define noundef <4 x i32> @sign_half_vector(<4 x half> noundef %a) {77entry:78; CHECK: %[[#vec4_float_16_arg:]] = OpFunctionParameter %[[#vec4_float_16]]79; CHECK: %[[#fsign:]] = OpExtInst %[[#vec4_float_16]] %[[#op_ext_glsl]] FSign %[[#vec4_float_16_arg]]80; CHECK: %[[#]] = OpConvertFToS %[[#vec4_int_32]] %[[#fsign]]81 %elt.sign = call <4 x i32> @llvm.spv.sign.v4f16(<4 x half> %a)82 ret <4 x i32> %elt.sign83}84 85define noundef <4 x i32> @sign_float_vector(<4 x float> noundef %a) {86entry:87; CHECK: %[[#vec4_float_32_arg:]] = OpFunctionParameter %[[#vec4_float_32]]88; CHECK: %[[#fsign:]] = OpExtInst %[[#vec4_float_32]] %[[#op_ext_glsl]] FSign %[[#vec4_float_32_arg]]89; CHECK: %[[#]] = OpConvertFToS %[[#vec4_int_32]] %[[#fsign]]90 %elt.sign = call <4 x i32> @llvm.spv.sign.v4f32(<4 x float> %a)91 ret <4 x i32> %elt.sign92}93 94define noundef <4 x i32> @sign_double_vector(<4 x double> noundef %a) {95entry:96; CHECK: %[[#vec4_float_64_arg:]] = OpFunctionParameter %[[#vec4_float_64]]97; CHECK: %[[#fsign:]] = OpExtInst %[[#vec4_float_64]] %[[#op_ext_glsl]] FSign %[[#vec4_float_64_arg]]98; CHECK: %[[#]] = OpConvertFToS %[[#vec4_int_32]] %[[#fsign]]99 %elt.sign = call <4 x i32> @llvm.spv.sign.v4f64(<4 x double> %a)100 ret <4 x i32> %elt.sign101}102 103define noundef <4 x i32> @sign_i16_vector(<4 x i16> noundef %a) {104entry:105; CHECK: %[[#vec4_int_16_arg:]] = OpFunctionParameter %[[#vec4_int_16]]106; CHECK: %[[#ssign:]] = OpExtInst %[[#vec4_int_16]] %[[#op_ext_glsl]] SSign %[[#vec4_int_16_arg]]107; CHECK: %[[#]] = OpSConvert %[[#vec4_int_32]] %[[#ssign]]108 %elt.sign = call <4 x i32> @llvm.spv.sign.v4i16(<4 x i16> %a)109 ret <4 x i32> %elt.sign110}111 112define noundef <4 x i32> @sign_i32_vector(<4 x i32> noundef %a) {113entry:114; CHECK: %[[#vec4_int_32_arg:]] = OpFunctionParameter %[[#vec4_int_32]]115; CHECK: %[[#]] = OpExtInst %[[#vec4_int_32]] %[[#op_ext_glsl]] SSign %[[#vec4_int_32_arg]]116 %elt.sign = call <4 x i32> @llvm.spv.sign.v4i32(<4 x i32> %a)117 ret <4 x i32> %elt.sign118}119 120define noundef <4 x i32> @sign_i64_vector(<4 x i64> noundef %a) {121entry:122; CHECK: %[[#vec4_int_64_arg:]] = OpFunctionParameter %[[#vec4_int_64]]123; CHECK: %[[#ssign:]] = OpExtInst %[[#vec4_int_64]] %[[#op_ext_glsl]] SSign %[[#vec4_int_64_arg]]124; CHECK: %[[#]] = OpSConvert %[[#vec4_int_32]] %[[#ssign]]125 %elt.sign = call <4 x i32> @llvm.spv.sign.v4i64(<4 x i64> %a)126 ret <4 x i32> %elt.sign127}128 129declare i32 @llvm.spv.sign.f16(half)130declare i32 @llvm.spv.sign.f32(float)131declare i32 @llvm.spv.sign.f64(double)132 133declare i32 @llvm.spv.sign.i16(i16)134declare i32 @llvm.spv.sign.i32(i32)135declare i32 @llvm.spv.sign.i64(i64)136 137declare <4 x i32> @llvm.spv.sign.v4f16(<4 x half>)138declare <4 x i32> @llvm.spv.sign.v4f32(<4 x float>)139declare <4 x i32> @llvm.spv.sign.v4f64(<4 x double>)140 141declare <4 x i32> @llvm.spv.sign.v4i16(<4 x i16>)142declare <4 x i32> @llvm.spv.sign.v4i32(<4 x i32>)143declare <4 x i32> @llvm.spv.sign.v4i64(<4 x i64>)144