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1; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv-unknown-vulkan %s -o - | FileCheck %s2; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-vulkan %s -o - -filetype=obj | spirv-val --target-env vulkan1.3 %}3 4; CHECK-DAG: %[[#int:]] = OpTypeInt 32 05; CHECK-DAG: %[[#double:]] = OpTypeFloat 646; CHECK-DAG: %[[#v4int:]] = OpTypeVector %[[#int]] 47; CHECK-DAG: %[[#v4double:]] = OpTypeVector %[[#double]] 48; CHECK-DAG: %[[#v2int:]] = OpTypeVector %[[#int]] 29; CHECK-DAG: %[[#v2double:]] = OpTypeVector %[[#double]] 210; CHECK-DAG: %[[#v3int:]] = OpTypeVector %[[#int]] 311; CHECK-DAG: %[[#v3double:]] = OpTypeVector %[[#double]] 312; CHECK-DAG: %[[#ptr_v4double:]] = OpTypePointer Private %[[#v4double]]13; CHECK-DAG: %[[#ptr_v4int:]] = OpTypePointer Private %[[#v4int]]14; CHECK-DAG: %[[#ptr_v3double:]] = OpTypePointer Private %[[#v3double]]15; CHECK-DAG: %[[#ptr_v3int:]] = OpTypePointer Private %[[#v3int]]16; CHECK-DAG: %[[#GVec4:]] = OpVariable %[[#ptr_v4double]] Private17; CHECK-DAG: %[[#Lows:]] = OpVariable %[[#ptr_v4int]] Private18; CHECK-DAG: %[[#Highs:]] = OpVariable %[[#ptr_v4int]] Private19; CHECK-DAG: %[[#GVec3:]] = OpVariable %[[#ptr_v3double]] Private20; CHECK-DAG: %[[#Lows3:]] = OpVariable %[[#ptr_v3int]] Private21; CHECK-DAG: %[[#Highs3:]] = OpVariable %[[#ptr_v3int]] Private22 23@GVec4 = internal addrspace(10) global <4 x double> zeroinitializer24@Lows = internal addrspace(10) global <4 x i32> zeroinitializer25@Highs = internal addrspace(10) global <4 x i32> zeroinitializer26@GVec3 = internal addrspace(10) global <3 x double> zeroinitializer27@Lows3 = internal addrspace(10) global <3 x i32> zeroinitializer28@Highs3 = internal addrspace(10) global <3 x i32> zeroinitializer29 30; Test splitting a vector of size 8.31define internal void @test_split() {32entry:33 ; CHECK: %[[#load_v4double:]] = OpLoad %[[#v4double]] %[[#GVec4]]34 ; CHECK: %[[#v2double_01:]] = OpVectorShuffle %[[#v2double]] %[[#load_v4double]] %{{[a-zA-Z0-9_]+}} 0 135 ; CHECK: %[[#v2double_23:]] = OpVectorShuffle %[[#v2double]] %[[#load_v4double]] %{{[a-zA-Z0-9_]+}} 2 336 ; CHECK: %[[#v4int_01:]] = OpBitcast %[[#v4int]] %[[#v2double_01]]37 ; CHECK: %[[#v4int_23:]] = OpBitcast %[[#v4int]] %[[#v2double_23]]38 %0 = load <8 x i32>, ptr addrspace(10) @GVec4, align 3239 40 ; CHECK: %[[#l0:]] = OpCompositeExtract %[[#int]] %[[#v4int_01]] 041 ; CHECK: %[[#l1:]] = OpCompositeExtract %[[#int]] %[[#v4int_01]] 242 ; CHECK: %[[#l2:]] = OpCompositeExtract %[[#int]] %[[#v4int_23]] 043 ; CHECK: %[[#l3:]] = OpCompositeExtract %[[#int]] %[[#v4int_23]] 244 ; CHECK: %[[#res_low:]] = OpCompositeConstruct %[[#v4int]] %[[#l0]] %[[#l1]] %[[#l2]] %[[#l3]]45 %1 = shufflevector <8 x i32> %0, <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>46 47 ; CHECK: %[[#h0:]] = OpCompositeExtract %[[#int]] %[[#v4int_01]] 148 ; CHECK: %[[#h1:]] = OpCompositeExtract %[[#int]] %[[#v4int_01]] 349 ; CHECK: %[[#h2:]] = OpCompositeExtract %[[#int]] %[[#v4int_23]] 150 ; CHECK: %[[#h3:]] = OpCompositeExtract %[[#int]] %[[#v4int_23]] 351 ; CHECK: %[[#res_high:]] = OpCompositeConstruct %[[#v4int]] %[[#h0]] %[[#h1]] %[[#h2]] %[[#h3]]52 %2 = shufflevector <8 x i32> %0, <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>53 54 store <4 x i32> %1, ptr addrspace(10) @Lows, align 1655 store <4 x i32> %2, ptr addrspace(10) @Highs, align 1656 ret void57}58 59define internal void @test_recombine() {60entry:61 ; CHECK: %[[#l:]] = OpLoad %[[#v4int]] %[[#Lows]]62 %0 = load <4 x i32>, ptr addrspace(10) @Lows, align 1663 ; CHECK: %[[#h:]] = OpLoad %[[#v4int]] %[[#Highs]]64 %1 = load <4 x i32>, ptr addrspace(10) @Highs, align 1665 66 ; CHECK-DAG: %[[#l0:]] = OpCompositeExtract %[[#int]] %[[#l]] 067 ; CHECK-DAG: %[[#l1:]] = OpCompositeExtract %[[#int]] %[[#l]] 168 ; CHECK-DAG: %[[#l2:]] = OpCompositeExtract %[[#int]] %[[#l]] 269 ; CHECK-DAG: %[[#l3:]] = OpCompositeExtract %[[#int]] %[[#l]] 370 ; CHECK-DAG: %[[#h0:]] = OpCompositeExtract %[[#int]] %[[#h]] 071 ; CHECK-DAG: %[[#h1:]] = OpCompositeExtract %[[#int]] %[[#h]] 172 ; CHECK-DAG: %[[#h2:]] = OpCompositeExtract %[[#int]] %[[#h]] 273 ; CHECK-DAG: %[[#h3:]] = OpCompositeExtract %[[#int]] %[[#h]] 374 ; CHECK-DAG: %[[#v2i0:]] = OpCompositeConstruct %[[#v2int]] %[[#l0]] %[[#h0]]75 ; CHECK-DAG: %[[#d0:]] = OpBitcast %[[#double]] %[[#v2i0]]76 ; CHECK-DAG: %[[#v2i1:]] = OpCompositeConstruct %[[#v2int]] %[[#l1]] %[[#h1]]77 ; CHECK-DAG: %[[#d1:]] = OpBitcast %[[#double]] %[[#v2i1]]78 ; CHECK-DAG: %[[#v2i2:]] = OpCompositeConstruct %[[#v2int]] %[[#l2]] %[[#h2]]79 ; CHECK-DAG: %[[#d2:]] = OpBitcast %[[#double]] %[[#v2i2]]80 ; CHECK-DAG: %[[#v2i3:]] = OpCompositeConstruct %[[#v2int]] %[[#l3]] %[[#h3]]81 ; CHECK-DAG: %[[#d3:]] = OpBitcast %[[#double]] %[[#v2i3]]82 ; CHECK-DAG: %[[#res:]] = OpCompositeConstruct %[[#v4double]] %[[#d0]] %[[#d1]] %[[#d2]] %[[#d3]]83 %2 = shufflevector <4 x i32> %0, <4 x i32> %1, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>84 85 ; CHECK: OpStore %[[#GVec4]] %[[#res]]86 store <8 x i32> %2, ptr addrspace(10) @GVec4, align 3287 ret void88}89 90; Test splitting a vector of size 6. It must be expanded to 8, and then split.91define internal void @test_bitcast_expand() {92entry:93 ; CHECK: %[[#load:]] = OpLoad %[[#v3double]] %[[#GVec3]]94 %0 = load <3 x double>, ptr addrspace(10) @GVec3, align 3295 96 ; CHECK: %[[#d0:]] = OpCompositeExtract %[[#double]] %[[#load]] 097 ; CHECK: %[[#d1:]] = OpCompositeExtract %[[#double]] %[[#load]] 198 ; CHECK: %[[#d2:]] = OpCompositeExtract %[[#double]] %[[#load]] 299 ; CHECK: %[[#v2d0:]] = OpCompositeConstruct %[[#v2double]] %[[#d0]] %[[#d1]]100 ; CHECK: %[[#v2d1:]] = OpCompositeConstruct %[[#v2double]] %[[#d2]] %[[#]]101 ; CHECK: %[[#v4i0:]] = OpBitcast %[[#v4int]] %[[#v2d0]]102 ; CHECK: %[[#v4i1:]] = OpBitcast %[[#v4int]] %[[#v2d1]]103 %1 = bitcast <3 x double> %0 to <6 x i32>104 105 ; CHECK: %[[#l0:]] = OpCompositeExtract %[[#int]] %[[#v4i0]] 0106 ; CHECK: %[[#l1:]] = OpCompositeExtract %[[#int]] %[[#v4i0]] 2107 ; CHECK: %[[#l2:]] = OpCompositeExtract %[[#int]] %[[#v4i1]] 0108 ; CHECK: %[[#res_low:]] = OpCompositeConstruct %[[#v3int]] %[[#l0]] %[[#l1]] %[[#l2]]109 %2 = shufflevector <6 x i32> %1, <6 x i32> poison, <3 x i32> <i32 0, i32 2, i32 4>110 111 ; CHECK: %[[#h0:]] = OpCompositeExtract %[[#int]] %[[#v4i0]] 1112 ; CHECK: %[[#h1:]] = OpCompositeExtract %[[#int]] %[[#v4i0]] 3113 ; CHECK: %[[#h2:]] = OpCompositeExtract %[[#int]] %[[#v4i1]] 1114 ; CHECK: %[[#res_high:]] = OpCompositeConstruct %[[#v3int]] %[[#h0]] %[[#h1]] %[[#h2]]115 %3 = shufflevector <6 x i32> %1, <6 x i32> poison, <3 x i32> <i32 1, i32 3, i32 5>116 117 ; CHECK: OpStore %[[#Lows3]] %[[#res_low]]118 store <3 x i32> %2, ptr addrspace(10) @Lows3, align 16119 120 ; CHECK: OpStore %[[#Highs3]] %[[#res_high]]121 store <3 x i32> %3, ptr addrspace(10) @Highs3, align 16122 ret void123}124 125define void @main() local_unnamed_addr #0 {126entry:127 call void @test_split()128 call void @test_recombine()129 call void @test_bitcast_expand()130 ret void131}132 133attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" }134