409 lines · plain
1; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s2; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}3 4; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s5; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o - -filetype=obj | spirv-val %}6 7; CHECK-DAG: %[[#BoolTy:]] = OpTypeBool8; CHECK-DAG: %[[#FP32Ty:]] = OpTypeFloat 329; CHECK-DAG: %[[#FP64Ty:]] = OpTypeFloat 6410; CHECK-DAG: %[[#FP16Ty:]] = OpTypeFloat 1611; CHECK-DAG: %[[#I32Ty:]] = OpTypeInt 32 012; CHECK-DAG: %[[#I64Ty:]] = OpTypeInt 64 013; CHECK-DAG: %[[#I16Ty:]] = OpTypeInt 16 014 15; CHECK-DAG: %[[#V4I32Ty:]] = OpTypeVector %[[#I32Ty]] 416; CHECK-DAG: %[[#V4FP32Ty:]] = OpTypeVector %[[#FP32Ty]] 417; CHECK-DAG: %[[#V4BoolTy:]] = OpTypeVector %[[#BoolTy]] 418 19; CHECK-DAG: %[[#MaxExpMinus1:]] = OpConstant %[[#I32Ty]] 213070643220; CHECK-DAG: %[[#ExpLSB:]] = OpConstant %[[#I32Ty]] 838860821; CHECK-DAG: %[[#True:]] = OpConstantTrue %[[#BoolTy]]22; CHECK-DAG: %[[#False:]] = OpConstantFalse %[[#BoolTy]]23; CHECK-DAG: %[[#ValueMask:]] = OpConstant %[[#I32Ty]] 214748364724; CHECK-DAG: %[[#InfWithQnanBit:]] = OpConstant %[[#I32Ty]] 214328934425; CHECK-DAG: %[[#Inf:]] = OpConstant %[[#I32Ty]] 213909504026; CHECK-DAG: %[[#NegInf:]] = OpConstant %[[#I32Ty]] 428657868827; CHECK-DAG: %[[#One:]] = OpConstant %[[#I32Ty]] 128; CHECK-DAG: %[[#Zero:]] = OpConstantNull %[[#I32Ty]]29; CHECK-DAG: %[[#AllOneMantissa:]] = OpConstant %[[#I32Ty]] 838860730; CHECK-DAG: %[[#SignBit:]] = OpConstant %[[#I32Ty]] 214748364831 32; CHECK-DAG: %[[#ValueMaskFP64:]] = OpConstant %[[#I64Ty]] 922337203685477580733; CHECK-DAG: %[[#InfFP64:]] = OpConstant %[[#I64Ty]] 921886843722740531234; CHECK-DAG: %[[#NegInfFP64:]] = OpConstant %[[#I64Ty]] 1844224047408218112035 36; CHECK-DAG: %[[#FalseV4:]] = OpConstantComposite %[[#V4BoolTy]] %[[#False]] %[[#False]] %[[#False]] %[[#False]]37; CHECK-DAG: %[[#ValueMaskV4:]] = OpConstantComposite %[[#V4I32Ty]] %[[#ValueMask]] %[[#ValueMask]] %[[#ValueMask]] %[[#ValueMask]]38; CHECK-DAG: %[[#InfV4:]] = OpConstantComposite %[[#V4I32Ty]] %[[#Inf]] %[[#Inf]] %[[#Inf]] %[[#Inf]]39; CHECK-DAG: %[[#InfWithQnanBitV4:]] = OpConstantComposite %[[#V4I32Ty]] %[[#InfWithQnanBit]] %[[#InfWithQnanBit]] %[[#InfWithQnanBit]] %[[#InfWithQnanBit]]40; CHECK-DAG: %[[#ValueMaskFP16:]] = OpConstant %[[#I16Ty]] 3276741; CHECK-DAG: %[[#InfFP16:]] = OpConstant %[[#I16Ty]] 3174442; CHECK-DAG: %[[#NegInfFP16:]] = OpConstant %[[#I16Ty]] 6451243 44; CHECK: OpFunction %[[#BoolTy]]45; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]46; CHECK: OpReturnValue %[[#False]]47; CHECK: OpFunctionEnd48define i1 @isfpclass_0_none(float %a) {49 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 0)50 ret i1 %v51}52 53; CHECK: OpFunction %[[#BoolTy]]54; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]55; CHECK: %[[#T0:]] = OpBitcast %[[#I32Ty]] %[[#A]]56; CHECK: %[[#T1:]] = OpBitwiseAnd %[[#I32Ty]] %[[#T0]] %[[#ValueMask]]57; CHECK: %[[#T2:]] = OpUGreaterThan %[[#BoolTy]] %[[#T1]] %[[#Inf]]58; CHECK: %[[#T3:]] = OpULessThan %[[#BoolTy]] %[[#T1]] %[[#InfWithQnanBit]]59; CHECK: %[[#T4:]] = OpLogicalAnd %[[#BoolTy]] %[[#T2]] %[[#T3]]60; CHECK: %[[#T5:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T4]]61; CHECK: OpReturnValue %[[#T5]]62; CHECK: OpFunctionEnd63 64define i1 @isfpclass_1_issnan(float %a) {65 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 1)66 ret i1 %v67}68 69; CHECK: OpFunction %[[#V4BoolTy]]70; CHECK: %[[#A:]] = OpFunctionParameter %[[#V4FP32Ty]]71; CHECK: %[[#T0:]] = OpBitcast %[[#V4I32Ty]] %[[#A]]72; CHECK: %[[#T1:]] = OpBitwiseAnd %[[#V4I32Ty]] %[[#T0]] %[[#ValueMaskV4]]73; CHECK: %[[#T2:]] = OpUGreaterThan %[[#V4BoolTy]] %[[#T1]] %[[#InfV4]]74; CHECK: %[[#T3:]] = OpULessThan %[[#V4BoolTy]] %[[#T1]] %[[#InfWithQnanBitV4]]75; CHECK: %[[#T4:]] = OpLogicalAnd %[[#V4BoolTy]] %[[#T2]] %[[#T3]]76; CHECK: %[[#T5:]] = OpLogicalOr %[[#V4BoolTy]] %[[#FalseV4]] %[[#T4]]77; CHECK: OpReturnValue %[[#T5]]78; CHECK: OpFunctionEnd79 80define <4 x i1> @isfpclass_1_issnan_v4f32(<4 x float> %a) {81 %v = call <4 x i1> @llvm.is.fpclass.v4f32(<4 x float> %a, i32 1)82 ret <4 x i1> %v83}84 85; CHECK: OpFunction %[[#BoolTy]]86; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]87; CHECK: %[[#T0:]] = OpBitcast %[[#I32Ty]] %[[#A]]88; CHECK: %[[#T1:]] = OpBitwiseAnd %[[#I32Ty]] %[[#T0]] %[[#ValueMask]]89; CHECK: %[[#T2:]] = OpUGreaterThanEqual %[[#BoolTy]] %[[#T1]] %[[#InfWithQnanBit]]90; CHECK: %[[#T3:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T2]]91; CHECK: OpReturnValue %[[#T3]]92; CHECK: OpFunctionEnd93define i1 @isfpclass_1_isqnan(float %a) {94 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 2)95 ret i1 %v96}97 98; CHECK: OpFunction %[[#BoolTy]]99; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]100; CHECK: %[[#T0:]] = OpBitcast %[[#I32Ty]] %[[#A]]101; CHECK: %[[#T1:]] = OpBitwiseAnd %[[#I32Ty]] %[[#T0]] %[[#ValueMask]]102; CHECK: %[[#T2:]] = OpUGreaterThan %[[#BoolTy]] %[[#T1]] %[[#Inf]]103; CHECK: %[[#T3:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T2]]104; CHECK: OpReturnValue %[[#T3]]105; CHECK: OpFunctionEnd106define i1 @isfpclass_1_isnan(float %a) {107 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 3)108 ret i1 %v109}110 111; CHECK: OpFunction %[[#BoolTy]]112; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]113; CHECK: %[[#T0:]] = OpBitcast %[[#I32Ty]] %[[#A]]114; CHECK: %[[#T1:]] = OpIEqual %[[#BoolTy]] %[[#T0]] %[[#Inf]]115; CHECK: %[[#T2:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T1]]116; CHECK: OpReturnValue %[[#T2]]117; CHECK: OpFunctionEnd118define i1 @isfpclass_1_ispinf(float %a) {119 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 512)120 ret i1 %v121}122 123; CHECK: OpFunction %[[#BoolTy]]124; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]125; CHECK: %[[#T0:]] = OpBitcast %[[#I32Ty]] %[[#A]]126; CHECK: %[[#T1:]] = OpIEqual %[[#BoolTy]] %[[#T0]] %[[#NegInf]]127; CHECK: %[[#T2:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T1]]128; CHECK: OpReturnValue %[[#T2]]129; CHECK: OpFunctionEnd130define i1 @isfpclass_1_isninf(float %a) {131 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 4)132 ret i1 %v133}134 135; CHECK: OpFunction %[[#BoolTy]]136; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]137; CHECK: %[[#T0:]] = OpBitcast %[[#I32Ty]] %[[#A]]138; CHECK: %[[#T1:]] = OpBitwiseAnd %[[#I32Ty]] %[[#T0]] %[[#ValueMask]]139; CHECK: %[[#T2:]] = OpIEqual %[[#BoolTy]] %[[#T1]] %[[#Inf]]140; CHECK: %[[#T3:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T2]]141; CHECK: OpReturnValue %[[#T3]]142; CHECK: OpFunctionEnd143define i1 @isfpclass_1_isinf(float %a) {144 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 516)145 ret i1 %v146}147 148; CHECK: OpFunction %[[#BoolTy]]149; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]150; CHECK: %[[#T0:]] = OpBitcast %[[#I32Ty]] %[[#A]]151; CHECK: %[[#T1:]] = OpBitwiseAnd %[[#I32Ty]] %[[#T0]] %[[#ValueMask]]152; CHECK: %[[#T2:]] = OpINotEqual %[[#BoolTy]] %[[#T0]] %[[#T1]]153; CHECK: %[[#T3:]] = OpISub %[[#I32Ty]] %[[#T1]] %[[#ExpLSB]]154; CHECK: %[[#T4:]] = OpULessThan %[[#BoolTy]] %[[#T3]] %[[#MaxExpMinus1]]155; CHECK: %[[#T5:]] = OpLogicalNotEqual %[[#BoolTy]] %[[#T2]] %[[#True]]156; CHECK: %[[#T6:]] = OpLogicalAnd %[[#BoolTy]] %[[#T4]] %[[#T5]]157; CHECK: %[[#T7:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T6]]158; CHECK: OpReturnValue %[[#T7]]159; CHECK: OpFunctionEnd160define i1 @isfpclass_isposnormal(float %a) {161 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 256)162 ret i1 %v163}164 165; CHECK: OpFunction %[[#BoolTy]]166; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]167; CHECK: %[[#T0:]] = OpBitcast %[[#I32Ty]] %[[#A]]168; CHECK: %[[#T1:]] = OpBitwiseAnd %[[#I32Ty]] %[[#T0]] %[[#ValueMask]]169; CHECK: %[[#T2:]] = OpINotEqual %[[#BoolTy]] %[[#T0]] %[[#T1]]170; CHECK: %[[#T3:]] = OpISub %[[#I32Ty]] %[[#T1]] %[[#ExpLSB]]171; CHECK: %[[#T4:]] = OpULessThan %[[#BoolTy]] %[[#T3]] %[[#MaxExpMinus1]]172; CHECK: %[[#T5:]] = OpLogicalAnd %[[#BoolTy]] %[[#T4]] %[[#T2]]173; CHECK: %[[#T6:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T5]]174; CHECK: OpReturnValue %[[#T6]]175; CHECK: OpFunctionEnd176define i1 @isfpclass_isnegnormal(float %a) {177 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 8)178 ret i1 %v179}180 181; CHECK: OpFunction %[[#BoolTy]]182; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]183; CHECK: %[[#T0:]] = OpBitcast %[[#I32Ty]] %[[#A]]184; CHECK: %[[#T1:]] = OpBitwiseAnd %[[#I32Ty]] %[[#T0]] %[[#ValueMask]]185; CHECK: %[[#T2:]] = OpISub %[[#I32Ty]] %[[#T1]] %[[#ExpLSB]]186; CHECK: %[[#T3:]] = OpULessThan %[[#BoolTy]] %[[#T2]] %[[#MaxExpMinus1]]187; CHECK: %[[#T4:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T3]]188; CHECK: OpReturnValue %[[#T4]]189; CHECK: OpFunctionEnd190define i1 @isfpclass_isnormal(float %a) {191 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 264)192 ret i1 %v193}194 195; CHECK: OpFunction %[[#BoolTy]]196; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]197; CHECK: %[[#T0:]] = OpBitcast %[[#I32Ty]] %[[#A]]198; CHECK: %[[#T1:]] = OpBitwiseAnd %[[#I32Ty]] %[[#T0]] %[[#ValueMask]]199; CHECK: %[[#T2:]] = OpUGreaterThan %[[#BoolTy]] %[[#T1]] %[[#Inf]]200; CHECK: %[[#T3:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T2]]201; CHECK: %[[#T4:]] = OpISub %[[#I32Ty]] %[[#T1]] %[[#ExpLSB]]202; CHECK: %[[#T5:]] = OpULessThan %[[#BoolTy]] %[[#T4]] %[[#MaxExpMinus1]]203; CHECK: %[[#T6:]] = OpLogicalOr %[[#BoolTy]] %[[#T3]] %[[#T5]]204; CHECK: OpReturnValue %[[#T6]]205; CHECK: OpFunctionEnd206define i1 @isfpclass_1_isnan_or_normal(float %a) {207 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 267)208 ret i1 %v209}210 211; CHECK: OpFunction %[[#BoolTy]]212; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]213; CHECK: %[[#T0:]] = OpBitcast %[[#I32Ty]] %[[#A]]214; CHECK: %[[#T1:]] = OpISub %[[#I32Ty]] %[[#T0]] %[[#One]]215; CHECK: %[[#T2:]] = OpULessThan %[[#BoolTy]] %[[#T1]] %[[#AllOneMantissa]]216; CHECK: %[[#T3:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T2]]217; CHECK: OpReturnValue %[[#T3]]218; CHECK: OpFunctionEnd219define i1 @isfpclass_ispsubnormal(float %a) {220 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 128)221 ret i1 %v222}223 224; CHECK: OpFunction %[[#BoolTy]]225; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]226; CHECK: %[[#T0:]] = OpBitcast %[[#I32Ty]] %[[#A]]227; CHECK: %[[#T1:]] = OpBitwiseAnd %[[#I32Ty]] %[[#T0]] %[[#ValueMask]]228; CHECK: %[[#T2:]] = OpINotEqual %[[#BoolTy]] %[[#T0]] %[[#T1]]229; CHECK: %[[#T3:]] = OpISub %[[#I32Ty]] %[[#T1]] %[[#One]]230; CHECK: %[[#T4:]] = OpULessThan %[[#BoolTy]] %[[#T3]] %[[#AllOneMantissa]]231; CHECK: %[[#T5:]] = OpLogicalAnd %[[#BoolTy]] %[[#T4]] %[[#T2]]232; CHECK: %[[#T6:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T5]]233; CHECK: OpReturnValue %[[#T6]]234; CHECK: OpFunctionEnd235define i1 @isfpclass_isnsubnormal(float %a) {236 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 16)237 ret i1 %v238}239 240; CHECK: OpFunction %[[#BoolTy]]241; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]242; CHECK: %[[#T0:]] = OpBitcast %[[#I32Ty]] %[[#A]]243; CHECK: %[[#T1:]] = OpBitwiseAnd %[[#I32Ty]] %[[#T0]] %[[#ValueMask]]244; CHECK: %[[#T2:]] = OpISub %[[#I32Ty]] %[[#T1]] %[[#One]]245; CHECK: %[[#T3:]] = OpULessThan %[[#BoolTy]] %[[#T2]] %[[#AllOneMantissa]]246; CHECK: %[[#T4:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T3]]247; CHECK: OpReturnValue %[[#T4]]248; CHECK: OpFunctionEnd249define i1 @isfpclass_issubnormal(float %a) {250 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 144)251 ret i1 %v252}253 254; CHECK: OpFunction %[[#BoolTy]]255; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]256; CHECK: %[[#T0:]] = OpBitcast %[[#I32Ty]] %[[#A]]257; CHECK: %[[#T1:]] = OpIEqual %[[#BoolTy]] %[[#T0]] %[[#Zero]]258; CHECK: %[[#T2:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T1]]259; CHECK: OpReturnValue %[[#T2]]260; CHECK: OpFunctionEnd261define i1 @isfpclass_ispzero(float %a) {262 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 64)263 ret i1 %v264}265 266; CHECK: OpFunction %[[#BoolTy]]267; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]268; CHECK: %[[#T0:]] = OpBitcast %[[#I32Ty]] %[[#A]]269; CHECK: %[[#T1:]] = OpIEqual %[[#BoolTy]] %[[#T0]] %[[#SignBit]]270; CHECK: %[[#T2:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T1]]271; CHECK: OpReturnValue %[[#T2]]272; CHECK: OpFunctionEnd273define i1 @isfpclass_isnzero(float %a) {274 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 32)275 ret i1 %v276}277 278; CHECK: OpFunction %[[#BoolTy]]279; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]280; CHECK: %[[#T0:]] = OpBitcast %[[#I32Ty]] %[[#A]]281; CHECK: %[[#T1:]] = OpBitwiseAnd %[[#I32Ty]] %[[#T0]] %[[#ValueMask]]282; CHECK: %[[#T2:]] = OpIEqual %[[#BoolTy]] %[[#T1]] %[[#Zero]]283; CHECK: %[[#T3:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T2]]284; CHECK: OpReturnValue %[[#T3]]285; CHECK: OpFunctionEnd286define i1 @isfpclass_iszero(float %a) {287 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 96)288 ret i1 %v289}290 291; CHECK: OpFunction %[[#BoolTy]]292; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]293; CHECK: %[[#T0:]] = OpBitcast %[[#I32Ty]] %[[#A]]294; CHECK: %[[#T1:]] = OpULessThan %[[#BoolTy]] %[[#T0]] %[[#Inf]]295; CHECK: %[[#T2:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T1]]296; CHECK: OpReturnValue %[[#T2]]297; CHECK: OpFunctionEnd298define i1 @isfpclass_ispfinite(float %a) {299 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 448)300 ret i1 %v301}302 303; CHECK: OpFunction %[[#BoolTy]]304; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]305; CHECK: %[[#T0:]] = OpBitcast %[[#I32Ty]] %[[#A]]306; CHECK: %[[#T1:]] = OpBitwiseAnd %[[#I32Ty]] %[[#T0]] %[[#ValueMask]]307; CHECK: %[[#T2:]] = OpINotEqual %[[#BoolTy]] %[[#T0]] %[[#T1]]308; CHECK: %[[#T3:]] = OpULessThan %[[#BoolTy]] %[[#T1]] %[[#Inf]]309; CHECK: %[[#T4:]] = OpLogicalAnd %[[#BoolTy]] %[[#T3]] %[[#T2]]310; CHECK: %[[#T5:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T4]]311; CHECK: OpReturnValue %[[#T5]]312; CHECK: OpFunctionEnd313define i1 @isfpclass_isnfinite(float %a) {314 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 56)315 ret i1 %v316}317 318; CHECK: OpFunction %[[#BoolTy]]319; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]320; CHECK: %[[#T0:]] = OpBitcast %[[#I32Ty]] %[[#A]]321; CHECK: %[[#T1:]] = OpBitwiseAnd %[[#I32Ty]] %[[#T0]] %[[#ValueMask]]322; CHECK: %[[#T2:]] = OpULessThan %[[#BoolTy]] %[[#T1]] %[[#Inf]]323; CHECK: %[[#T3:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T2]]324; CHECK: OpReturnValue %[[#T3]]325; CHECK: OpFunctionEnd326define i1 @isfpclass_isfinite(float %a) {327 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 504)328 ret i1 %v329}330 331; CHECK: OpFunction %[[#BoolTy]]332; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]333; CHECK: %[[#T0:]] = OpBitcast %[[#I32Ty]] %[[#A]]334; CHECK: %[[#T1:]] = OpULessThan %[[#BoolTy]] %[[#T0]] %[[#Inf]]335; CHECK: %[[#T2:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T1]]336; CHECK: %[[#T3:]] = OpIEqual %[[#BoolTy]] %[[#T0]] %[[#Inf]]337; CHECK: %[[#T4:]] = OpLogicalOr %[[#BoolTy]] %[[#T2]] %[[#T3]]338; CHECK: OpReturnValue %[[#T4]]339; CHECK: OpFunctionEnd340define i1 @isfpclass_ispositive(float %a) {341 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 960)342 ret i1 %v343}344 345; CHECK: OpFunction %[[#BoolTy]]346; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]347; CHECK: %[[#T0:]] = OpBitcast %[[#I32Ty]] %[[#A]]348; CHECK: %[[#T1:]] = OpBitwiseAnd %[[#I32Ty]] %[[#T0]] %[[#ValueMask]]349; CHECK: %[[#T2:]] = OpINotEqual %[[#BoolTy]] %[[#T0]] %[[#T1]]350; CHECK: %[[#T3:]] = OpULessThan %[[#BoolTy]] %[[#T1]] %[[#Inf]]351; CHECK: %[[#T4:]] = OpLogicalAnd %[[#BoolTy]] %[[#T3]] %[[#T2]]352; CHECK: %[[#T5:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T4]]353; CHECK: %[[#T6:]] = OpIEqual %[[#BoolTy]] %[[#T0]] %[[#NegInf]]354; CHECK: %[[#T7:]] = OpLogicalOr %[[#BoolTy]] %[[#T5]] %[[#T6]]355; CHECK: OpReturnValue %[[#T7]]356; CHECK: OpFunctionEnd357define i1 @isfpclass_isnegative(float %a) {358 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 60)359 ret i1 %v360}361 362; CHECK: OpFunction %[[#BoolTy]]363; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP32Ty]]364; CHECK: OpReturnValue %[[#True]]365; CHECK: OpFunctionEnd366define i1 @isfpclass_all(float %a) {367 %v = call i1 @llvm.is.fpclass.f32(float %a, i32 1023)368 ret i1 %v369}370 371; CHECK: OpFunction %[[#BoolTy]]372; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP64Ty]]373; CHECK: %[[#T0:]] = OpBitcast %[[#I64Ty]] %[[#A]]374; CHECK: %[[#T1:]] = OpBitwiseAnd %[[#I64Ty]] %[[#T0]] %[[#ValueMaskFP64]]375; CHECK: %[[#T2:]] = OpINotEqual %[[#BoolTy]] %[[#T0]] %[[#T1]]376; CHECK: %[[#T3:]] = OpULessThan %[[#BoolTy]] %[[#T1]] %[[#InfFP64]]377; CHECK: %[[#T4:]] = OpLogicalAnd %[[#BoolTy]] %[[#T3]] %[[#T2]]378; CHECK: %[[#T5:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T4]]379; CHECK: %[[#T6:]] = OpIEqual %[[#BoolTy]] %[[#T0]] %[[#NegInfFP64]]380; CHECK: %[[#T7:]] = OpLogicalOr %[[#BoolTy]] %[[#T5]] %[[#T6]]381; CHECK: OpReturnValue %[[#T7]]382; CHECK: OpFunctionEnd383define i1 @isfpclass_f64_isnegative(double %a) {384 %v = call i1 @llvm.is.fpclass.f64(double %a, i32 60)385 ret i1 %v386}387 388; CHECK: OpFunction %[[#BoolTy]]389; CHECK: %[[#A:]] = OpFunctionParameter %[[#FP16Ty]]390; CHECK: %[[#T0:]] = OpBitcast %[[#I16Ty]] %[[#A]]391; CHECK: %[[#T1:]] = OpBitwiseAnd %[[#I16Ty]] %[[#T0]] %[[#ValueMaskFP16]]392; CHECK: %[[#T2:]] = OpINotEqual %[[#BoolTy]] %[[#T0]] %[[#T1]]393; CHECK: %[[#T3:]] = OpULessThan %[[#BoolTy]] %[[#T1]] %[[#InfFP16]]394; CHECK: %[[#T4:]] = OpLogicalAnd %[[#BoolTy]] %[[#T3]] %[[#T2]]395; CHECK: %[[#T5:]] = OpLogicalOr %[[#BoolTy]] %[[#False]] %[[#T4]]396; CHECK: %[[#T6:]] = OpIEqual %[[#BoolTy]] %[[#T0]] %[[#NegInfFP16]]397; CHECK: %[[#T7:]] = OpLogicalOr %[[#BoolTy]] %[[#T5]] %[[#T6]]398; CHECK: OpReturnValue %[[#T7]]399; CHECK: OpFunctionEnd400define i1 @isfpclass_f16_isnegative(half %a) {401 %v = call i1 @llvm.is.fpclass.f16(half %a, i32 60)402 ret i1 %v403}404 405declare i1 @llvm.is.fpclass.f32(float, i32)406declare <4 x i1> @llvm.is.fpclass.v4f32(<4 x float>, i32)407declare i1 @llvm.is.fpclass.f64(double, i32)408declare i1 @llvm.is.fpclass.f16(half, i32)409