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1; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s2; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o - -filetype=obj | spirv-val %}3 4; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s5; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}6 7; CHECK: OpExtInstImport "OpenCL.std"8; CHECK-DAG: OpName %[[#Foo:]] "foo"9; CHECK-DAG: OpName %[[#Bar:]] "bar"10; CHECK: %[[#Foo]] = OpFunction11; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] u_add_sat12; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] u_sub_sat13; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] s_add_sat14; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] s_sub_sat15; CHECK: %[[#Bar]] = OpFunction16; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] u_add_sat17; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] u_sub_sat18; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] s_add_sat19; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] s_sub_sat20 21@G_r1_foo = global i16 022@G_r2_foo = global i16 023@G_r3_foo = global i16 024@G_r4_foo = global i16 025@G_r1_bar = global <4 x i32> zeroinitializer26@G_r2_bar = global <4 x i32> zeroinitializer27@G_r3_bar = global <4 x i32> zeroinitializer28@G_r4_bar = global <4 x i32> zeroinitializer29 30define spir_func void @foo(i16 %x, i16 %y) {31entry:32 %r1 = tail call i16 @llvm.uadd.sat.i16(i16 %x, i16 %y)33 store i16 %r1, ptr @G_r1_foo34 %r2 = tail call i16 @llvm.usub.sat.i16(i16 %x, i16 %y)35 store i16 %r2, ptr @G_r2_foo36 %r3 = tail call i16 @llvm.sadd.sat.i16(i16 %x, i16 %y)37 store i16 %r3, ptr @G_r3_foo38 %r4 = tail call i16 @llvm.ssub.sat.i16(i16 %x, i16 %y)39 store i16 %r4, ptr @G_r4_foo40 ret void41}42 43define spir_func void @bar(<4 x i32> %x, <4 x i32> %y) {44entry:45 %r1 = tail call <4 x i32> @llvm.uadd.sat.v4i32(<4 x i32> %x, <4 x i32> %y)46 store <4 x i32> %r1, ptr @G_r1_bar47 %r2 = tail call <4 x i32> @llvm.usub.sat.v4i32(<4 x i32> %x, <4 x i32> %y)48 store <4 x i32> %r2, ptr @G_r2_bar49 %r3 = tail call <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32> %x, <4 x i32> %y)50 store <4 x i32> %r3, ptr @G_r3_bar51 %r4 = tail call <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32> %x, <4 x i32> %y)52 store <4 x i32> %r4, ptr @G_r4_bar53 ret void54}55 56declare i16 @llvm.uadd.sat.i16(i16, i16)57declare i16 @llvm.usub.sat.i16(i16, i16)58declare i16 @llvm.sadd.sat.i16(i16, i16)59declare i16 @llvm.ssub.sat.i16(i16, i16)60declare <4 x i32> @llvm.uadd.sat.v4i32(<4 x i32>, <4 x i32>)61declare <4 x i32> @llvm.usub.sat.v4i32(<4 x i32>, <4 x i32>)62declare <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32>, <4 x i32>)63declare <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32>, <4 x i32>)64