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1; RUN: llc -mtriple=spirv-unknown-vulkan-compute -O0 %s -o - --asm-verbose=0 | FileCheck %s2; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-vulkan-compute %s -o - -filetype=obj | spirv-val %}3 4target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-G1"5target triple = "spirv-unknown-vulkan1.3-compute"6 7define internal spir_func void @main() #3 {8; CHECK-DAG: OpName %[[#switch_0:]] "reg1"9; CHECK-DAG: OpName %[[#switch_1:]] "reg"10 11; CHECK-DAG: %[[#int_0:]] = OpConstant %[[#]] 012; CHECK-DAG: %[[#int_1:]] = OpConstant %[[#]] 113 14; CHECK: %[[#entry:]] = OpLabel15; CHECK-DAG: %[[#switch_0]] = OpVariable %[[#]] Function16; CHECK-DAG: %[[#switch_1]] = OpVariable %[[#]] Function17; CHECK: OpSelectionMerge %[[#merge:]] None18; CHECK: OpBranchConditional %[[#]] %[[#new_header:]] %[[#unreachable:]]19 20; CHECK: %[[#unreachable]] = OpLabel21; CHECK-NEXT: OpUnreachable22 23; CHECK: %[[#new_header]] = OpLabel24; CHECK: OpSelectionMerge %[[#new_merge:]] None25; CHECK: OpBranchConditional %[[#]] %[[#taint_true_merge:]] %[[#br_false:]]26 27; CHECK: %[[#br_false]] = OpLabel28; CHECK-DAG: OpStore %[[#switch_1]] %[[#int_0]]29; CHECK: OpSelectionMerge %[[#taint_merge:]] None30; CHECK: OpBranchConditional %[[#]] %[[#taint_merge]] %[[#taint_false:]]31 32; CHECK: %[[#taint_false]] = OpLabel33; CHECK: OpStore %[[#switch_1]] %[[#int_1]]34; CHECK: OpBranch %[[#taint_merge]]35 36; CHECK: %[[#taint_merge]] = OpLabel37; CHECK: OpStore %[[#switch_0]] %[[#int_0]]38; CHECK: %[[#tmp:]] = OpLoad %[[#]] %[[#switch_1]]39; CHECK: %[[#cond:]] = OpIEqual %[[#]] %[[#int_0]] %[[#tmp]]40; CHECK: OpBranchConditional %[[#cond]] %[[#taint_false_true:]] %[[#new_merge]]41 42; CHECK: %[[#taint_false_true]] = OpLabel43; CHECK: OpStore %[[#switch_0]] %[[#int_1]]44; CHECK: OpBranch %[[#new_merge]]45 46; CHECK: %[[#taint_true_merge]] = OpLabel47; CHECK: OpStore %[[#switch_0]] %[[#int_1]]48; CHECK: OpBranch %[[#new_merge]]49 50; CHECK: %[[#new_merge]] = OpLabel51; CHECK: %[[#tmp:]] = OpLoad %[[#]] %[[#switch_0]]52; CHECK: %[[#cond:]] = OpIEqual %[[#]] %[[#int_0]] %[[#tmp]]53; CHECK: OpBranchConditional %[[#cond]] %[[#merge]] %[[#br_true:]]54 55; CHECK: %[[#br_true]] = OpLabel56; CHECK: OpBranch %[[#merge]]57 58; CHECK: %[[#merge]] = OpLabel59; CHECK: OpReturn60 61entry:62 %0 = call token @llvm.experimental.convergence.entry()63 %var = alloca i32, align 464 br i1 true, label %br_true, label %br_false65 66br_false:67 store i32 0, ptr %var, align 468 br i1 true, label %br_true, label %merge69 70br_true:71 store i32 0, ptr %var, align 472 br label %merge73 74merge:75 ret void76}77 78declare token @llvm.experimental.convergence.entry() #279 80attributes #0 = { convergent noinline nounwind optnone "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }81attributes #2 = { convergent nocallback nofree nosync nounwind willreturn memory(none) }82attributes #3 = { convergent noinline norecurse nounwind optnone "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }83 84!llvm.module.flags = !{!0, !1, !2}85 86!0 = !{i32 1, !"wchar_size", i32 4}87!1 = !{i32 4, !"dx.disable_optimizations", i32 1}88!2 = !{i32 7, !"frame-pointer", i32 2}89