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1; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s 2; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64v1.2-unknown-unknown %s -o - -filetype=obj | spirv-val %}3 4; CHECK-NOT: OpCapability Int64Atomics5 6; CHECK-DAG: %[[#int:]] = OpTypeInt 32 07; CHECK-DAG: %[[#int8:]] = OpTypeInt 8 08; CHECK-DAG: %[[#DeviceScope:]] = OpConstant %[[#int]] 19; CHECK-DAG: %[[#SequentiallyConsistent_MS:]] = OpConstant %[[#int]] 1610; CHECK-DAG: %[[#int_ptr:]] = OpTypePointer Generic %[[#int]]11; CHECK-DAG: %[[#int_ptr8:]] = OpTypePointer Generic %[[#int8]]12; CHECK-DAG: %[[#bool:]] = OpTypeBool13 14define spir_func void @test(ptr addrspace(4) %object, ptr addrspace(4) %expected, i32 %desired) {15 16; CHECK: %[[#object:]] = OpFunctionParameter %[[#int_ptr8]]17; CHECK: %[[#expected:]] = OpFunctionParameter %[[#int_ptr8]] 18; CHECK: %[[#desired:]] = OpFunctionParameter %[[#int]]19 20entry:21 %object.addr = alloca ptr addrspace(4), align 422 %expected.addr = alloca ptr addrspace(4), align 423 %desired.addr = alloca i32, align 424 %strong_res = alloca i8, align 125 %res = alloca i8, align 126 %weak_res = alloca i8, align 127 store ptr addrspace(4) %object, ptr %object.addr, align 428 store ptr addrspace(4) %expected, ptr %expected.addr, align 429 store i32 %desired, ptr %desired.addr, align 430 %0 = load ptr addrspace(4), ptr %object.addr, align 431 %1 = load ptr addrspace(4), ptr %expected.addr, align 432 %2 = load i32, ptr %desired.addr, align 433 34; CHECK-DAG: OpStore %[[#object_addr:]] %[[#object]]35; CHECK-DAG: OpStore %[[#expected_addr:]] %[[#expected]]36; CHECK-DAG: OpStore %[[#desired_addr:]] %[[#desired]]37 38; CHECK: %[[#Pointer:]] = OpLoad %[[#int_ptr]] %[[#]]39; CHECK: %[[#exp:]] = OpLoad %[[#int_ptr]] %[[#]]40; CHECK: %[[#Value:]] = OpLoad %[[#int]] %[[#desired_addr]]41; CHECK: %[[#Comparator:]] = OpLoad %[[#int]] %[[#exp]]42 43; CHECK: %[[#Result:]] = OpAtomicCompareExchange %[[#int]] %[[#]] %[[#DeviceScope]] %[[#SequentiallyConsistent_MS]] %[[#SequentiallyConsistent_MS]] %[[#Value]] %[[#Comparator]]44 %call = call spir_func zeroext i1 @_Z30atomic_compare_exchange_strongPVU3AS4U7_AtomiciPU3AS4ii(ptr addrspace(4) %0, ptr addrspace(4) %1, i32 %2)45 46; CHECK-NEXT: OpStore %[[#exp]] %[[#Result]]47; CHECK-NEXT: %[[#CallRes:]] = OpIEqual %[[#bool]] %[[#Result]] %[[#Comparator]]48; CHECK-NOT: %[[#Result]]49 50 %frombool = zext i1 %call to i851 store i8 %frombool, ptr %strong_res, align 152 %3 = load i8, ptr %strong_res, align 153 %tobool = trunc i8 %3 to i154 %lnot = xor i1 %tobool, true55 %frombool1 = zext i1 %lnot to i856 store i8 %frombool1, ptr %res, align 157 %4 = load ptr addrspace(4), ptr %object.addr, align 458 %5 = load ptr addrspace(4), ptr %expected.addr, align 459 %6 = load i32, ptr %desired.addr, align 460 61; CHECK: %[[#Pointer:]] = OpLoad %[[#int_ptr]] %[[#]]62; CHECK: %[[#exp:]] = OpLoad %[[#int_ptr]] %[[#]]63; CHECK: %[[#Value:]] = OpLoad %[[#int]] %[[#desired_addr]]64; CHECK: %[[#ComparatorWeak:]] = OpLoad %[[#int]] %[[#exp]]65 66; CHECK: %[[#Result:]] = OpAtomicCompareExchangeWeak %[[#int]] %[[#]] %[[#DeviceScope]] %[[#SequentiallyConsistent_MS]] %[[#SequentiallyConsistent_MS]] %[[#Value]] %[[#ComparatorWeak]]67 %call2 = call spir_func zeroext i1 @_Z28atomic_compare_exchange_weakPVU3AS4U7_AtomiciPU3AS4ii(ptr addrspace(4) %4, ptr addrspace(4) %5, i32 %6)68 69; CHECK-NEXT: OpStore %[[#exp]] %[[#Result]]70; CHECK-NEXT: %[[#CallRes:]] = OpIEqual %[[#bool]] %[[#Result]] %[[#ComparatorWeak]]71; CHECK-NOT: %[[#Result]]72 73 %frombool3 = zext i1 %call2 to i874 store i8 %frombool3, ptr %weak_res, align 175 %7 = load i8, ptr %weak_res, align 176 %tobool4 = trunc i8 %7 to i177 %lnot5 = xor i1 %tobool4, true78 %frombool6 = zext i1 %lnot5 to i879 store i8 %frombool6, ptr %res, align 180 ret void81}82 83declare spir_func zeroext i1 @_Z30atomic_compare_exchange_strongPVU3AS4U7_AtomiciPU3AS4ii(ptr addrspace(4), ptr addrspace(4), i32) #184declare spir_func zeroext i1 @_Z28atomic_compare_exchange_weakPVU3AS4U7_AtomiciPU3AS4ii(ptr addrspace(4), ptr addrspace(4), i32) #185