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1; Test 32-bit ANDs in which the second operand is constant.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s4 5; ANDs with 1 can use NILF.6define i32 @f1(i32 %a) {7; CHECK-LABEL: f1:8; CHECK: nilf %r2, 19; CHECK: br %r1410  %and = and i32 %a, 111  ret i32 %and12}13 14; ...but RISBLG is available as a three-address form.15define i32 @f2(i32 %a, i32 %b) {16; CHECK-LABEL: f2:17; CHECK: risblg %r2, %r3, 31, 159, 018; CHECK: br %r1419  %and = and i32 %b, 120  ret i32 %and21}22 23; ...same for 4.24define i32 @f3(i32 %a, i32 %b) {25; CHECK-LABEL: f3:26; CHECK: risblg %r2, %r3, 29, 157, 027; CHECK: br %r1428  %and = and i32 %b, 429  ret i32 %and30}31 32; ANDs with 5 must use NILF.33define i32 @f4(i32 %a) {34; CHECK-LABEL: f4:35; CHECK: nilf %r2, 536; CHECK: br %r1437  %and = and i32 %a, 538  ret i32 %and39}40 41; ...a single RISBLG isn't enough.42define i32 @f5(i32 %a, i32 %b) {43; CHECK-LABEL: f5:44; CHECK-NOT: risb45; CHECK: br %r1446  %and = and i32 %b, 547  ret i32 %and48}49 50; Check the highest 16-bit constant that must be handled by NILF.51define i32 @f6(i32 %a) {52; CHECK-LABEL: f6:53; CHECK: nilf %r2, 6553354; CHECK: br %r1455  %and = and i32 %a, 6553356  ret i32 %and57}58 59; ...a single RISBLG isn't enough.60define i32 @f7(i32 %a, i32 %b) {61; CHECK-LABEL: f7:62; CHECK-NOT: risb63; CHECK: br %r1464  %and = and i32 %b, 6553365  ret i32 %and66}67 68; Check the next highest value, which can use NILF.69define i32 @f8(i32 %a) {70; CHECK-LABEL: f8:71; CHECK: nilf %r2, 6553472; CHECK: br %r1473  %and = and i32 %a, 6553474  ret i32 %and75}76 77; ...although the three-address case should use RISBLG.78define i32 @f9(i32 %a, i32 %b) {79; CHECK-LABEL: f9:80; CHECK: risblg %r2, %r3, 16, 158, 081; CHECK: br %r1482  %and = and i32 %b, 6553483  ret i32 %and84}85 86; ANDs of 0xffff are zero extensions from i16.87define i32 @f10(i32 %a, i32 %b) {88; CHECK-LABEL: f10:89; CHECK: llhr %r2, %r390; CHECK: br %r1491  %and = and i32 %b, 6553592  ret i32 %and93}94 95; Check the next value up, which must again use NILF.96define i32 @f11(i32 %a) {97; CHECK-LABEL: f11:98; CHECK: nilf %r2, 6553699; CHECK: br %r14100  %and = and i32 %a, 65536101  ret i32 %and102}103 104; ...but the three-address case can use RISBLG.105define i32 @f12(i32 %a, i32 %b) {106; CHECK-LABEL: f12:107; CHECK: risblg %r2, %r3, 15, 143, 0108; CHECK: br %r14109  %and = and i32 %b, 65536110  ret i32 %and111}112 113; Check the lowest useful NILH value.114define i32 @f13(i32 %a) {115; CHECK-LABEL: f13:116; CHECK: nilh %r2, 1117; CHECK: br %r14118  %and = and i32 %a, 131071119  ret i32 %and120}121 122; ...but RISBLG is OK in the three-address case.123define i32 @f14(i32 %a, i32 %b) {124; CHECK-LABEL: f14:125; CHECK: risblg %r2, %r3, 15, 159, 0126; CHECK: br %r14127  %and = and i32 %b, 131071128  ret i32 %and129}130 131; Check the highest useful NILF value.132define i32 @f15(i32 %a) {133; CHECK-LABEL: f15:134; CHECK: nilf %r2, 4294901758135; CHECK: br %r14136  %and = and i32 %a, -65538137  ret i32 %and138}139 140; Check the next value up, which is the highest useful NILH value.141define i32 @f16(i32 %a) {142; CHECK-LABEL: f16:143; CHECK: nilh %r2, 65534144; CHECK: br %r14145  %and = and i32 %a, -65537146  ret i32 %and147}148 149; Check the next value up, which is the first useful NILL value.150define i32 @f17(i32 %a) {151; CHECK-LABEL: f17:152; CHECK: nill %r2, 0153; CHECK: br %r14154  %and = and i32 %a, -65536155  ret i32 %and156}157 158; ...although the three-address case should use RISBLG.159define i32 @f18(i32 %a, i32 %b) {160; CHECK-LABEL: f18:161; CHECK: risblg %r2, %r3, 0, 143, 0162; CHECK: br %r14163  %and = and i32 %b, -65536164  ret i32 %and165}166 167; Check the next value up again, which can still use NILL.168define i32 @f19(i32 %a) {169; CHECK-LABEL: f19:170; CHECK: nill %r2, 1171; CHECK: br %r14172  %and = and i32 %a, -65535173  ret i32 %and174}175 176; Check the next value up again, which cannot use RISBLG.177define i32 @f20(i32 %a, i32 %b) {178; CHECK-LABEL: f20:179; CHECK-NOT: risb180; CHECK: br %r14181  %and = and i32 %b, -65534182  ret i32 %and183}184 185; Check the last useful mask, which can use NILL.186define i32 @f21(i32 %a) {187; CHECK-LABEL: f21:188; CHECK: nill %r2, 65534189; CHECK: br %r14190  %and = and i32 %a, -2191  ret i32 %and192}193 194; ...or RISBLG for the three-address case.195define i32 @f22(i32 %a, i32 %b) {196; CHECK-LABEL: f22:197; CHECK: risblg %r2, %r3, 0, 158, 0198; CHECK: br %r14199  %and = and i32 %b, -2200  ret i32 %and201}202 203; Test that RISBLG can be used when inserting a non-wraparound mask204; into another register.205define i64 @f23(i64 %a, i32 %b) {206; CHECK-LABEL: f23:207; CHECK: risblg %r2, %r3, 30, 158, 0208; CHECK: br %r14209  %and1 = and i64 %a, -4294967296210  %and2 = and i32 %b, 2211  %ext = zext i32 %and2 to i64212  %or = or i64 %and1, %ext213  ret i64 %or214}215 216; ...and when inserting a wrap-around mask.217define i64 @f24(i64 %a, i32 %b) {218; CHECK-LABEL: f24:219; CHECK: risblg %r2, %r3, 30, 156220; CHECK: br %r14221  %and1 = and i64 %a, -4294967296222  %and2 = and i32 %b, -5223  %ext = zext i32 %and2 to i64224  %or = or i64 %and1, %ext225  ret i64 %or226}227