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1; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s2 3; Make sure all regs are spilled4define anyregcc void @anyregcc1() {5entry:6;CHECK-LABEL: anyregcc17;CHECK: stmg %r2, %r15, 16(%r15)8;CHECK: vst %v0,9;CHECK: vst %v1,10;CHECK: vst %v2,11;CHECK: vst %v3,12;CHECK: vst %v4,13;CHECK: vst %v5,14;CHECK: vst %v6,15;CHECK: vst %v7,16;CHECK: vst %v8,17;CHECK: vst %v9,18;CHECK: vst %v10,19;CHECK: vst %v11,20;CHECK: vst %v12,21;CHECK: vst %v13,22;CHECK: vst %v14,23;CHECK: vst %v15,24;CHECK: vst %v16,25;CHECK: vst %v17,26;CHECK: vst %v18,27;CHECK: vst %v19,28;CHECK: vst %v20,29;CHECK: vst %v21,30;CHECK: vst %v22,31;CHECK: vst %v23,32;CHECK: vst %v24,33;CHECK: vst %v25,34;CHECK: vst %v26,35;CHECK: vst %v27,36;CHECK: vst %v28,37;CHECK: vst %v29,38;CHECK: vst %v30,39;CHECK: vst %v31,40 call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"() nounwind41 ret void42}43 44; Make sure we don't spill any FPs45declare anyregcc void @foo()46define void @anyregcc2() {47entry:48;CHECK-LABEL: anyregcc249;CHECK-NOT: std50;CHECK-NOT: vst51;CHECK: std %f8,52;CHECK-NEXT: std %f9,53;CHECK-NEXT: std %f10,54;CHECK-NEXT: std %f11,55;CHECK-NEXT: std %f12,56;CHECK-NEXT: std %f13,57;CHECK-NEXT: std %f14,58;CHECK-NEXT: std %f15,59;CHECK-NOT: std60;CHECK-NOT: vst61 %a0 = call <2 x i64> asm sideeffect "", "={v0}"() nounwind62 %a1 = call <2 x i64> asm sideeffect "", "={v1}"() nounwind63 %a2 = call <2 x i64> asm sideeffect "", "={v2}"() nounwind64 %a3 = call <2 x i64> asm sideeffect "", "={v3}"() nounwind65 %a4 = call <2 x i64> asm sideeffect "", "={v4}"() nounwind66 %a5 = call <2 x i64> asm sideeffect "", "={v5}"() nounwind67 %a6 = call <2 x i64> asm sideeffect "", "={v6}"() nounwind68 %a7 = call <2 x i64> asm sideeffect "", "={v7}"() nounwind69 %a8 = call <2 x i64> asm sideeffect "", "={v8}"() nounwind70 %a9 = call <2 x i64> asm sideeffect "", "={v9}"() nounwind71 %a10 = call <2 x i64> asm sideeffect "", "={v10}"() nounwind72 %a11 = call <2 x i64> asm sideeffect "", "={v11}"() nounwind73 %a12 = call <2 x i64> asm sideeffect "", "={v12}"() nounwind74 %a13 = call <2 x i64> asm sideeffect "", "={v13}"() nounwind75 %a14 = call <2 x i64> asm sideeffect "", "={v14}"() nounwind76 %a15 = call <2 x i64> asm sideeffect "", "={v15}"() nounwind77 %a16 = call <2 x i64> asm sideeffect "", "={v16}"() nounwind78 %a17 = call <2 x i64> asm sideeffect "", "={v17}"() nounwind79 %a18 = call <2 x i64> asm sideeffect "", "={v18}"() nounwind80 %a19 = call <2 x i64> asm sideeffect "", "={v19}"() nounwind81 %a20 = call <2 x i64> asm sideeffect "", "={v20}"() nounwind82 %a21 = call <2 x i64> asm sideeffect "", "={v21}"() nounwind83 %a22 = call <2 x i64> asm sideeffect "", "={v22}"() nounwind84 %a23 = call <2 x i64> asm sideeffect "", "={v23}"() nounwind85 %a24 = call <2 x i64> asm sideeffect "", "={v24}"() nounwind86 %a25 = call <2 x i64> asm sideeffect "", "={v25}"() nounwind87 %a26 = call <2 x i64> asm sideeffect "", "={v26}"() nounwind88 %a27 = call <2 x i64> asm sideeffect "", "={v27}"() nounwind89 %a28 = call <2 x i64> asm sideeffect "", "={v28}"() nounwind90 %a29 = call <2 x i64> asm sideeffect "", "={v29}"() nounwind91 %a30 = call <2 x i64> asm sideeffect "", "={v30}"() nounwind92 %a31 = call <2 x i64> asm sideeffect "", "={v31}"() nounwind93 call anyregcc void @foo()94 call void asm sideeffect "", "{v0},{v1},{v2},{v3},{v4},{v5},{v6},{v7},{v8},{v9},{v10},{v11},{v12},{v13},{v14},{v15},{v16},{v17},{v18},{v19},{v20},{v21},{v22},{v23},{v24},{v25},{v26},{v27},{v28},{v29},{v30},{v31}"(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2, <2 x i64> %a3, <2 x i64> %a4, <2 x i64> %a5, <2 x i64> %a6, <2 x i64> %a7, <2 x i64> %a8, <2 x i64> %a9, <2 x i64> %a10, <2 x i64> %a11, <2 x i64> %a12, <2 x i64> %a13, <2 x i64> %a14, <2 x i64> %a15, <2 x i64> %a16, <2 x i64> %a17, <2 x i64> %a18, <2 x i64> %a19, <2 x i64> %a20, <2 x i64> %a21, <2 x i64> %a22, <2 x i64> %a23, <2 x i64> %a24, <2 x i64> %a25, <2 x i64> %a26, <2 x i64> %a27, <2 x i64> %a28, <2 x i64> %a29, <2 x i64> %a30, <2 x i64> %a31)95 ret void96}97 98declare void @llvm.experimental.patchpoint.void(i64, i32, ptr, i32, ...)99declare i64 @llvm.experimental.patchpoint.i64(i64, i32, ptr, i32, ...)100