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1; Test explicit register names.2;3; RUN: llc < %s -verify-machineinstrs -mtriple=s390x-linux-gnu -no-integrated-as \4; RUN: | FileCheck %s5 6; Test i32 GPRs.7define i32 @f1() {8; CHECK-LABEL: f1:9; CHECK: lhi %r4, 110; CHECK: blah %r411; CHECK: lr %r2, %r412; CHECK: br %r1413 %ret = call i32 asm "blah $0", "={r4},0" (i32 1)14 ret i32 %ret15}16 17; Test i64 GPRs.18define i64 @f2() {19; CHECK-LABEL: f2:20; CHECK: lghi %r4, 121; CHECK: blah %r422; CHECK: lgr %r2, %r423; CHECK: br %r1424 %ret = call i64 asm "blah $0", "={r4},0" (i64 1)25 ret i64 %ret26}27 28; Test 16-bit FPRs.29define half @f3_half() {30; CHECK-LABEL: f3_half:31; CHECK: lzer %f432; CHECK: blah %f433; CHECK: ler %f0, %f434; CHECK: br %r1435 %ret = call half asm "blah $0", "={f4},0" (half 0.0)36 ret half %ret37}38 39; Test i32 FPRs.40define float @f3() {41; CHECK-LABEL: f3:42; CHECK: lzer %f443; CHECK: blah %f444; CHECK: ler %f0, %f445; CHECK: br %r1446 %ret = call float asm "blah $0", "={f4},0" (float 0.0)47 ret float %ret48}49 50; Test i64 FPRs.51define double @f4() {52; CHECK-LABEL: f4:53; CHECK: lzdr %f454; CHECK: blah %f455; CHECK: ldr %f0, %f456; CHECK: br %r1457 %ret = call double asm "blah $0", "={f4},0" (double 0.0)58 ret double %ret59}60 61; Test i128 FPRs.62define void @f5(ptr %dest) {63; CHECK-LABEL: f5:64; CHECK: lzxr %f465; CHECK: blah %f466; CHECK-DAG: std %f4, 0(%r2)67; CHECK-DAG: std %f6, 8(%r2)68; CHECK: br %r1469 %ret = call fp128 asm "blah $0", "={f4},0" (fp128 0xL00000000000000000000000000000000)70 store fp128 %ret, ptr %dest71 ret void72}73 74; Test clobbers of GPRs and CC.75define i32 @f6(i32 %in) {76; CHECK-LABEL: f6:77; CHECK: lr [[REG:%r[01345]]], %r278; CHECK: blah79; CHECK: lr %r2, [[REG]]80; CHECK: br %r1481 call void asm sideeffect "blah", "~{r2},~{cc}"()82 ret i32 %in83}84 85; Test clobbers of FPRs and CC.86define float @f7(float %in) {87; CHECK-LABEL: f7:88; CHECK: ler [[REG:%f[1-7]]], %f089; CHECK: blah90; CHECK: ler %f0, [[REG]]91; CHECK: br %r1492 call void asm sideeffect "blah", "~{f0},~{cc}"()93 ret float %in94}95 96; Test that both registers in a GR128 pair get hoisted.97define void @f8(i32 %count) {98; CHECK-LABEL: f899; CHECK-DAG: lhi %r0, 0100; CHECK-DAG: lhi %r1, 1101; CHECK: %loop102; CHECK-NOT: %r103; CHECK: blah %r0, %r1104; CHECK: br %r14105entry:106 br label %loop107 108loop:109 %this = phi i32 [ %count, %entry ], [ %next, %loop ]110 call void asm sideeffect "blah $0, $1", "{r0},{r1}" (i32 0, i32 1)111 %next = sub i32 %this, 1112 %cmp = icmp ne i32 %next, 0113 br i1 %cmp, label %loop, label %exit114 115exit:116 ret void117}118