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1; Test long double atomic stores - via i128.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck -check-prefixes=CHECK,BASE %s4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck -check-prefixes=CHECK,Z13 %s5; RUN: llc < %s -mtriple=s390x-linux-gnu -mattr=+soft-float | FileCheck -check-prefixes=SOFTFP %s6 7define void @f1(ptr %dst, ptr %src) {8; CHECK-LABEL: f1:9; CHECK: # %bb.0:10; CHECK-NEXT: lg %r1, 8(%r3)11; CHECK-NEXT: lg %r0, 0(%r3)12; CHECK-NEXT: stpq %r0, 0(%r2)13; CHECK-NEXT: bcr 1{{[45]}}, %r014; CHECK-NEXT: br %r1415 16; SOFTFP-LABEL: f1:17; SOFTFP: # %bb.0:18; SOFTFP-NEXT: lg %r1, 8(%r3)19; SOFTFP-NEXT: lg %r0, 0(%r3)20; SOFTFP-NEXT: stpq %r0, 0(%r2)21; SOFTFP-NEXT: bcr 1{{[45]}}, %r022; SOFTFP-NEXT: br %r1423 %val = load fp128, ptr %src, align 824 store atomic fp128 %val, ptr %dst seq_cst, align 1625 ret void26}27 28define void @f1_fpsrc(ptr %dst, ptr %src) {29; CHECK-LABEL: f1_fpsrc:30; CHECK: # %bb.0:31; CHECK-NEXT: ld %f0, 0(%r3)32; CHECK-NEXT: ld %f2, 8(%r3)33; CHECK-NEXT: axbr %f0, %f034 35; BASE-NEXT: lgdr %r1, %f236; BASE-NEXT: lgdr %r0, %f037 38; Z13-NEXT: vmrhg %v0, %v0, %v239; Z13-NEXT: vlgvg %r1, %v0, 140; Z13-NEXT: vlgvg %r0, %v0, 041 42; CHECK-NEXT: stpq %r0, 0(%r2)43; CHECK-NEXT: bcr 1{{[45]}}, %r044; CHECK-NEXT: br %r1445 46; SOFTFP-LABEL: f1_fpsrc:47; SOFTFP: lg %r0, 8(%r3)48; SOFTFP-NEXT: lg %r1, 0(%r3)49; SOFTFP-NEXT: lgr %r13, %r250; SOFTFP-NEXT: stg %r0, 168(%r15)51; SOFTFP-NEXT: stg %r1, 160(%r15)52; SOFTFP-NEXT: stg %r0, 184(%r15)53; SOFTFP-NEXT: la %r2, 192(%r15)54; SOFTFP-NEXT: la %r3, 176(%r15)55; SOFTFP-NEXT: la %r4, 160(%r15)56; SOFTFP-NEXT: stg %r1, 176(%r15)57; SOFTFP-NEXT: brasl %r14, __addtf3@PLT58; SOFTFP-NEXT: lg %r1, 200(%r15)59; SOFTFP-NEXT: lg %r0, 192(%r15)60; SOFTFP-NEXT: stpq %r0, 0(%r13)61; SOFTFP-NEXT: bcr 1{{[45]}}, %r062; SOFTFP-NEXT: lmg %r13, %r15, 312(%r15)63; SOFTFP-NEXT: br %r1464 65 %val = load fp128, ptr %src, align 866 %add = fadd fp128 %val, %val67 store atomic fp128 %add, ptr %dst seq_cst, align 1668 ret void69}70 71define void @f2(ptr %dst, ptr %src) {72; CHECK-LABEL: f2:73; CHECK: brasl %r14, __atomic_store@PLT74 %val = load fp128, ptr %src, align 875 store atomic fp128 %val, ptr %dst seq_cst, align 876 ret void77}78 79define void @f2_fpuse(ptr %dst, ptr %src) {80; CHECK-LABEL: f2_fpuse:81; CHECK: # %bb.0:82; CHECK-NEXT: stmg %r14, %r15, 112(%r15)83; CHECK-NEXT: .cfi_offset %r14, -4884; CHECK-NEXT: .cfi_offset %r15, -4085; CHECK-NEXT: aghi %r15, -17686; CHECK-NEXT: .cfi_def_cfa_offset 33687; CHECK-NEXT: ld %f0, 0(%r3)88; CHECK-NEXT: ld %f2, 8(%r3)89; CHECK-DAG: lgr %r3, %r290; CHECK-DAG: axbr %f0, %f091; CHECK-NEXT: la %r4, 160(%r15)92; CHECK-NEXT: lghi %r2, 1693; CHECK-NEXT: lhi %r5, 594; CHECK-NEXT: std %f0, 160(%r15)95; CHECK-NEXT: std %f2, 168(%r15)96; CHECK-NEXT: brasl %r14, __atomic_store@PLT97 %val = load fp128, ptr %src, align 898 %add = fadd fp128 %val, %val99 store atomic fp128 %add, ptr %dst seq_cst, align 8100 ret void101}102