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1; Test 32-bit compare and swap.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s4 5; Check the low end of the CS range.6define i32 @f1(i32 %cmp, i32 %swap, ptr %src) {7; CHECK-LABEL: f1:8; CHECK: cs %r2, %r3, 0(%r4)9; CHECK: br %r1410 %pair = cmpxchg ptr %src, i32 %cmp, i32 %swap seq_cst seq_cst11 %val = extractvalue { i32, i1 } %pair, 012 ret i32 %val13}14 15; Check the high end of the aligned CS range.16define i32 @f2(i32 %cmp, i32 %swap, ptr %src) {17; CHECK-LABEL: f2:18; CHECK: cs %r2, %r3, 4092(%r4)19; CHECK: br %r1420 %ptr = getelementptr i32, ptr %src, i64 102321 %pair = cmpxchg ptr %ptr, i32 %cmp, i32 %swap seq_cst seq_cst22 %val = extractvalue { i32, i1 } %pair, 023 ret i32 %val24}25 26; Check the next word up, which should use CSY instead of CS.27define i32 @f3(i32 %cmp, i32 %swap, ptr %src) {28; CHECK-LABEL: f3:29; CHECK: csy %r2, %r3, 4096(%r4)30; CHECK: br %r1431 %ptr = getelementptr i32, ptr %src, i64 102432 %pair = cmpxchg ptr %ptr, i32 %cmp, i32 %swap seq_cst seq_cst33 %val = extractvalue { i32, i1 } %pair, 034 ret i32 %val35}36 37; Check the high end of the aligned CSY range.38define i32 @f4(i32 %cmp, i32 %swap, ptr %src) {39; CHECK-LABEL: f4:40; CHECK: csy %r2, %r3, 524284(%r4)41; CHECK: br %r1442 %ptr = getelementptr i32, ptr %src, i64 13107143 %pair = cmpxchg ptr %ptr, i32 %cmp, i32 %swap seq_cst seq_cst44 %val = extractvalue { i32, i1 } %pair, 045 ret i32 %val46}47 48; Check the next word up, which needs separate address logic.49; Other sequences besides this one would be OK.50define i32 @f5(i32 %cmp, i32 %swap, ptr %src) {51; CHECK-LABEL: f5:52; CHECK: agfi %r4, 52428853; CHECK: cs %r2, %r3, 0(%r4)54; CHECK: br %r1455 %ptr = getelementptr i32, ptr %src, i64 13107256 %pair = cmpxchg ptr %ptr, i32 %cmp, i32 %swap seq_cst seq_cst57 %val = extractvalue { i32, i1 } %pair, 058 ret i32 %val59}60 61; Check the high end of the negative aligned CSY range.62define i32 @f6(i32 %cmp, i32 %swap, ptr %src) {63; CHECK-LABEL: f6:64; CHECK: csy %r2, %r3, -4(%r4)65; CHECK: br %r1466 %ptr = getelementptr i32, ptr %src, i64 -167 %pair = cmpxchg ptr %ptr, i32 %cmp, i32 %swap seq_cst seq_cst68 %val = extractvalue { i32, i1 } %pair, 069 ret i32 %val70}71 72; Check the low end of the CSY range.73define i32 @f7(i32 %cmp, i32 %swap, ptr %src) {74; CHECK-LABEL: f7:75; CHECK: csy %r2, %r3, -524288(%r4)76; CHECK: br %r1477 %ptr = getelementptr i32, ptr %src, i64 -13107278 %pair = cmpxchg ptr %ptr, i32 %cmp, i32 %swap seq_cst seq_cst79 %val = extractvalue { i32, i1 } %pair, 080 ret i32 %val81}82 83; Check the next word down, which needs separate address logic.84; Other sequences besides this one would be OK.85define i32 @f8(i32 %cmp, i32 %swap, ptr %src) {86; CHECK-LABEL: f8:87; CHECK: agfi %r4, -52429288; CHECK: cs %r2, %r3, 0(%r4)89; CHECK: br %r1490 %ptr = getelementptr i32, ptr %src, i64 -13107391 %pair = cmpxchg ptr %ptr, i32 %cmp, i32 %swap seq_cst seq_cst92 %val = extractvalue { i32, i1 } %pair, 093 ret i32 %val94}95 96; Check that CS does not allow an index.97define i32 @f9(i32 %cmp, i32 %swap, i64 %src, i64 %index) {98; CHECK-LABEL: f9:99; CHECK: agr %r4, %r5100; CHECK: cs %r2, %r3, 0(%r4)101; CHECK: br %r14102 %add1 = add i64 %src, %index103 %ptr = inttoptr i64 %add1 to ptr104 %pair = cmpxchg ptr %ptr, i32 %cmp, i32 %swap seq_cst seq_cst105 %val = extractvalue { i32, i1 } %pair, 0106 ret i32 %val107}108 109; Check that CSY does not allow an index.110define i32 @f10(i32 %cmp, i32 %swap, i64 %src, i64 %index) {111; CHECK-LABEL: f10:112; CHECK: agr %r4, %r5113; CHECK: csy %r2, %r3, 4096(%r4)114; CHECK: br %r14115 %add1 = add i64 %src, %index116 %add2 = add i64 %add1, 4096117 %ptr = inttoptr i64 %add2 to ptr118 %pair = cmpxchg ptr %ptr, i32 %cmp, i32 %swap seq_cst seq_cst119 %val = extractvalue { i32, i1 } %pair, 0120 ret i32 %val121}122 123; Check that a constant %cmp value is loaded into a register first.124define i32 @f11(i32 %dummy, i32 %swap, ptr %ptr) {125; CHECK-LABEL: f11:126; CHECK: lhi %r2, 1001127; CHECK: cs %r2, %r3, 0(%r4)128; CHECK: br %r14129 %pair = cmpxchg ptr %ptr, i32 1001, i32 %swap seq_cst seq_cst130 %val = extractvalue { i32, i1 } %pair, 0131 ret i32 %val132}133 134; Check that a constant %swap value is loaded into a register first.135define i32 @f12(i32 %cmp, ptr %ptr) {136; CHECK-LABEL: f12:137; CHECK: lhi [[SWAP:%r[0-9]+]], 1002138; CHECK: cs %r2, [[SWAP]], 0(%r3)139; CHECK: br %r14140 %pair = cmpxchg ptr %ptr, i32 %cmp, i32 1002 seq_cst seq_cst141 %val = extractvalue { i32, i1 } %pair, 0142 ret i32 %val143}144 145; Check generating the comparison result.146; CHECK-LABEL: f13147; CHECK: cs %r2, %r3, 0(%r4)148; CHECK-NEXT: ipm %r2149; CHECK-NEXT: afi %r2, -268435456150; CHECK-NEXT: srl %r2, 31151; CHECK: br %r14152define i32 @f13(i32 %cmp, i32 %swap, ptr %src) {153 %pairval = cmpxchg ptr %src, i32 %cmp, i32 %swap seq_cst seq_cst154 %val = extractvalue { i32, i1 } %pairval, 1155 %res = zext i1 %val to i32156 ret i32 %res157}158 159declare void @g()160 161; Check using the comparison result for a branch.162; CHECK-LABEL: f14163; CHECK: cs %r2, %r3, 0(%r4)164; CHECK-NEXT: jge g165; CHECK: br %r14166define void @f14(i32 %cmp, i32 %swap, ptr %src) {167 %pairval = cmpxchg ptr %src, i32 %cmp, i32 %swap seq_cst seq_cst168 %cond = extractvalue { i32, i1 } %pairval, 1169 br i1 %cond, label %call, label %exit170 171call:172 tail call void @g()173 br label %exit174 175exit:176 ret void177}178 179; ... and the same with the inverted direction.180; CHECK-LABEL: f15181; CHECK: cs %r2, %r3, 0(%r4)182; CHECK-NEXT: jgl g183; CHECK: br %r14184define void @f15(i32 %cmp, i32 %swap, ptr %src) {185 %pairval = cmpxchg ptr %src, i32 %cmp, i32 %swap seq_cst seq_cst186 %cond = extractvalue { i32, i1 } %pairval, 1187 br i1 %cond, label %exit, label %call188 189call:190 tail call void @g()191 br label %exit192 193exit:194 ret void195}196 197