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1; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 -join-liveintervals=false -verify-machineinstrs | FileCheck %s2;3; Check that copyPhysReg() properly adds impl-use operands of the super4; register while lowering a COPY of a GR128 bit reg.5 6define void @autogen_SD5585(ptr, i64) {7; CHECK: .text8BB:9 %L5 = load i1, ptr undef10 %I8 = insertelement <8 x i64> undef, i64 %1, i32 311 %I21 = insertelement <8 x i64> zeroinitializer, i64 475435, i32 512 br label %CF29013 14CF290: ; preds = %CF290, %BB15 %B29 = urem <8 x i64> %I8, %I2116 %Cmp31 = icmp sge i1 undef, undef17 br i1 %Cmp31, label %CF290, label %CF29618 19CF296: ; preds = %CF29020 %FC36 = sitofp <8 x i64> %B29 to <8 x double>21 br label %CF30222 23CF302: ; preds = %CF307, %CF29624 %Shuff49 = shufflevector <8 x i64> undef, <8 x i64> zeroinitializer, <8 x i32> <i32 undef, i32 9, i32 11, i32 undef, i32 15, i32 1, i32 3, i32 5>25 %L69 = load i16, ptr undef26 br label %CF30727 28CF307: ; preds = %CF30229 %Cmp84 = icmp ne i16 undef, %L6930 br i1 %Cmp84, label %CF302, label %CF30131 32CF301: ; preds = %CF30733 %B126 = or i32 514315, undef34 br label %CF28035 36CF280: ; preds = %CF280, %CF30137 %I139 = insertelement <8 x i64> %Shuff49, i64 undef, i32 238 %B155 = udiv <8 x i64> %I8, %I13939 %Cmp157 = icmp ne i64 -1, undef40 br i1 %Cmp157, label %CF280, label %CF28141 42CF281: ; preds = %CF28043 %Cmp164 = icmp slt i1 %L5, %Cmp8444 br label %CF28245 46CF282: ; preds = %CF304, %CF28147 br label %CF28948 49CF289: ; preds = %CF289, %CF28250 store i32 %B126, ptr %051 %Cmp219 = icmp slt i64 undef, undef52 br i1 %Cmp219, label %CF289, label %CF30453 54CF304: ; preds = %CF28955 %Cmp234 = icmp ult i64 0, undef56 br i1 %Cmp234, label %CF282, label %CF28357 58CF283: ; preds = %CF308, %CF283, %CF30459 %E251 = extractelement <8 x i64> %B155, i32 060 br i1 undef, label %CF283, label %CF30861 62CF308: ; preds = %CF28363 store i1 %Cmp164, ptr undef64 br i1 undef, label %CF283, label %CF29365 66CF293: ; preds = %CF30867 ret void68}69