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1; Test 64-bit floating-point addition.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \4; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s5; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 -verify-machineinstrs | FileCheck %s6declare double @foo()7 8; Check register addition.9define double @f1(double %f1, double %f2) {10; CHECK-LABEL: f1:11; CHECK: adbr %f0, %f212; CHECK: br %r1413 %res = fadd double %f1, %f214 ret double %res15}16 17; Check the low end of the ADB range.18define double @f2(double %f1, ptr %ptr) {19; CHECK-LABEL: f2:20; CHECK: adb %f0, 0(%r2)21; CHECK: br %r1422 %f2 = load double, ptr %ptr23 %res = fadd double %f1, %f224 ret double %res25}26 27; Check the high end of the aligned ADB range.28define double @f3(double %f1, ptr %base) {29; CHECK-LABEL: f3:30; CHECK: adb %f0, 4088(%r2)31; CHECK: br %r1432 %ptr = getelementptr double, ptr %base, i64 51133 %f2 = load double, ptr %ptr34 %res = fadd double %f1, %f235 ret double %res36}37 38; Check the next doubleword up, which needs separate address logic.39; Other sequences besides this one would be OK.40define double @f4(double %f1, ptr %base) {41; CHECK-LABEL: f4:42; CHECK: aghi %r2, 409643; CHECK: adb %f0, 0(%r2)44; CHECK: br %r1445 %ptr = getelementptr double, ptr %base, i64 51246 %f2 = load double, ptr %ptr47 %res = fadd double %f1, %f248 ret double %res49}50 51; Check negative displacements, which also need separate address logic.52define double @f5(double %f1, ptr %base) {53; CHECK-LABEL: f5:54; CHECK: aghi %r2, -855; CHECK: adb %f0, 0(%r2)56; CHECK: br %r1457 %ptr = getelementptr double, ptr %base, i64 -158 %f2 = load double, ptr %ptr59 %res = fadd double %f1, %f260 ret double %res61}62 63; Check that ADB allows indices.64define double @f6(double %f1, ptr %base, i64 %index) {65; CHECK-LABEL: f6:66; CHECK: sllg %r1, %r3, 367; CHECK: adb %f0, 800(%r1,%r2)68; CHECK: br %r1469 %ptr1 = getelementptr double, ptr %base, i64 %index70 %ptr2 = getelementptr double, ptr %ptr1, i64 10071 %f2 = load double, ptr %ptr272 %res = fadd double %f1, %f273 ret double %res74}75 76; Check that additions of spilled values can use ADB rather than ADBR.77define double @f7(ptr %ptr0) {78; CHECK-LABEL: f7:79; CHECK: brasl %r14, foo@PLT80; CHECK-SCALAR: adb %f0, 160(%r15)81; CHECK: br %r1482 %ptr1 = getelementptr double, ptr %ptr0, i64 283 %ptr2 = getelementptr double, ptr %ptr0, i64 484 %ptr3 = getelementptr double, ptr %ptr0, i64 685 %ptr4 = getelementptr double, ptr %ptr0, i64 886 %ptr5 = getelementptr double, ptr %ptr0, i64 1087 %ptr6 = getelementptr double, ptr %ptr0, i64 1288 %ptr7 = getelementptr double, ptr %ptr0, i64 1489 %ptr8 = getelementptr double, ptr %ptr0, i64 1690 %ptr9 = getelementptr double, ptr %ptr0, i64 1891 %ptr10 = getelementptr double, ptr %ptr0, i64 2092 93 %val0 = load double, ptr %ptr094 %val1 = load double, ptr %ptr195 %val2 = load double, ptr %ptr296 %val3 = load double, ptr %ptr397 %val4 = load double, ptr %ptr498 %val5 = load double, ptr %ptr599 %val6 = load double, ptr %ptr6100 %val7 = load double, ptr %ptr7101 %val8 = load double, ptr %ptr8102 %val9 = load double, ptr %ptr9103 %val10 = load double, ptr %ptr10104 105 %ret = call double @foo()106 107 %add0 = fadd double %ret, %val0108 %add1 = fadd double %add0, %val1109 %add2 = fadd double %add1, %val2110 %add3 = fadd double %add2, %val3111 %add4 = fadd double %add3, %val4112 %add5 = fadd double %add4, %val5113 %add6 = fadd double %add5, %val6114 %add7 = fadd double %add6, %val7115 %add8 = fadd double %add7, %val8116 %add9 = fadd double %add8, %val9117 %add10 = fadd double %add9, %val10118 119 ret double %add10120}121 122; Check that reassociation flags do not get in the way of ADB.123define double @f8(ptr %x) {124; CHECK-LABEL: f8:125; CHECK: ld %f0126; CHECK: adb %f0127; CHECK: br %r14128entry:129 %0 = load double, ptr %x, align 8130 %arrayidx1 = getelementptr inbounds double, ptr %x, i64 1131 %1 = load double, ptr %arrayidx1, align 8132 %add = fadd reassoc nsz arcp contract afn double %1, %0133 ret double %add134}135