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1; Test 32-bit floating-point comparison. The tests assume a z10 implementation2; of select, using conditional branches rather than LOCGR.3;4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \5; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s6; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 \7; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-VECTOR %s8 9declare float @foo()10 11; Check comparison with registers.12define i64 @f1(i64 %a, i64 %b, float %f1, float %f2) {13; CHECK-LABEL: f1:14; CHECK: cebr %f0, %f215; CHECK-SCALAR-NEXT: ber %r1416; CHECK-SCALAR: lgr %r2, %r317; CHECK-VECTOR-NEXT: locgrne %r2, %r318; CHECK: br %r1419 %cond = fcmp oeq float %f1, %f220 %res = select i1 %cond, i64 %a, i64 %b21 ret i64 %res22}23 24; Check the low end of the CEB range.25define i64 @f2(i64 %a, i64 %b, float %f1, ptr %ptr) {26; CHECK-LABEL: f2:27; CHECK: ceb %f0, 0(%r4)28; CHECK-SCALAR-NEXT: ber %r1429; CHECK-SCALAR: lgr %r2, %r330; CHECK-VECTOR-NEXT: locgrne %r2, %r331; CHECK: br %r1432 %f2 = load float, ptr %ptr33 %cond = fcmp oeq float %f1, %f234 %res = select i1 %cond, i64 %a, i64 %b35 ret i64 %res36}37 38; Check the high end of the aligned CEB range.39define i64 @f3(i64 %a, i64 %b, float %f1, ptr %base) {40; CHECK-LABEL: f3:41; CHECK: ceb %f0, 4092(%r4)42; CHECK-SCALAR-NEXT: ber %r1443; CHECK-SCALAR: lgr %r2, %r344; CHECK-VECTOR-NEXT: locgrne %r2, %r345; CHECK: br %r1446 %ptr = getelementptr float, ptr %base, i64 102347 %f2 = load float, ptr %ptr48 %cond = fcmp oeq float %f1, %f249 %res = select i1 %cond, i64 %a, i64 %b50 ret i64 %res51}52 53; Check the next word up, which needs separate address logic.54; Other sequences besides this one would be OK.55define i64 @f4(i64 %a, i64 %b, float %f1, ptr %base) {56; CHECK-LABEL: f4:57; CHECK: aghi %r4, 409658; CHECK: ceb %f0, 0(%r4)59; CHECK-SCALAR-NEXT: ber %r1460; CHECK-SCALAR: lgr %r2, %r361; CHECK-VECTOR-NEXT: locgrne %r2, %r362; CHECK: br %r1463 %ptr = getelementptr float, ptr %base, i64 102464 %f2 = load float, ptr %ptr65 %cond = fcmp oeq float %f1, %f266 %res = select i1 %cond, i64 %a, i64 %b67 ret i64 %res68}69 70; Check negative displacements, which also need separate address logic.71define i64 @f5(i64 %a, i64 %b, float %f1, ptr %base) {72; CHECK-LABEL: f5:73; CHECK: aghi %r4, -474; CHECK: ceb %f0, 0(%r4)75; CHECK-SCALAR-NEXT: ber %r1476; CHECK-SCALAR: lgr %r2, %r377; CHECK-VECTOR-NEXT: locgrne %r2, %r378; CHECK: br %r1479 %ptr = getelementptr float, ptr %base, i64 -180 %f2 = load float, ptr %ptr81 %cond = fcmp oeq float %f1, %f282 %res = select i1 %cond, i64 %a, i64 %b83 ret i64 %res84}85 86; Check that CEB allows indices.87define i64 @f6(i64 %a, i64 %b, float %f1, ptr %base, i64 %index) {88; CHECK-LABEL: f6:89; CHECK: sllg %r1, %r5, 290; CHECK: ceb %f0, 400(%r1,%r4)91; CHECK-SCALAR-NEXT: ber %r1492; CHECK-SCALAR: lgr %r2, %r393; CHECK-VECTOR-NEXT: locgrne %r2, %r394; CHECK: br %r1495 %ptr1 = getelementptr float, ptr %base, i64 %index96 %ptr2 = getelementptr float, ptr %ptr1, i64 10097 %f2 = load float, ptr %ptr298 %cond = fcmp oeq float %f1, %f299 %res = select i1 %cond, i64 %a, i64 %b100 ret i64 %res101}102 103; Check that comparisons of spilled values can use CEB rather than CEBR.104define float @f7(ptr %ptr0) {105; CHECK-LABEL: f7:106; CHECK: brasl %r14, foo@PLT107; CHECK-SCALAR: ceb {{%f[0-9]+}}, 16{{[04]}}(%r15)108; CHECK: br %r14109 %ptr1 = getelementptr float, ptr %ptr0, i64 2110 %ptr2 = getelementptr float, ptr %ptr0, i64 4111 %ptr3 = getelementptr float, ptr %ptr0, i64 6112 %ptr4 = getelementptr float, ptr %ptr0, i64 8113 %ptr5 = getelementptr float, ptr %ptr0, i64 10114 %ptr6 = getelementptr float, ptr %ptr0, i64 12115 %ptr7 = getelementptr float, ptr %ptr0, i64 14116 %ptr8 = getelementptr float, ptr %ptr0, i64 16117 %ptr9 = getelementptr float, ptr %ptr0, i64 18118 %ptr10 = getelementptr float, ptr %ptr0, i64 20119 120 %val0 = load float, ptr %ptr0121 %val1 = load float, ptr %ptr1122 %val2 = load float, ptr %ptr2123 %val3 = load float, ptr %ptr3124 %val4 = load float, ptr %ptr4125 %val5 = load float, ptr %ptr5126 %val6 = load float, ptr %ptr6127 %val7 = load float, ptr %ptr7128 %val8 = load float, ptr %ptr8129 %val9 = load float, ptr %ptr9130 %val10 = load float, ptr %ptr10131 132 %ret = call float @foo()133 134 %cmp0 = fcmp olt float %ret, %val0135 %cmp1 = fcmp olt float %ret, %val1136 %cmp2 = fcmp olt float %ret, %val2137 %cmp3 = fcmp olt float %ret, %val3138 %cmp4 = fcmp olt float %ret, %val4139 %cmp5 = fcmp olt float %ret, %val5140 %cmp6 = fcmp olt float %ret, %val6141 %cmp7 = fcmp olt float %ret, %val7142 %cmp8 = fcmp olt float %ret, %val8143 %cmp9 = fcmp olt float %ret, %val9144 %cmp10 = fcmp olt float %ret, %val10145 146 %sel0 = select i1 %cmp0, float %ret, float 0.0147 %sel1 = select i1 %cmp1, float %sel0, float 1.0148 %sel2 = select i1 %cmp2, float %sel1, float 2.0149 %sel3 = select i1 %cmp3, float %sel2, float 3.0150 %sel4 = select i1 %cmp4, float %sel3, float 4.0151 %sel5 = select i1 %cmp5, float %sel4, float 5.0152 %sel6 = select i1 %cmp6, float %sel5, float 6.0153 %sel7 = select i1 %cmp7, float %sel6, float 7.0154 %sel8 = select i1 %cmp8, float %sel7, float 8.0155 %sel9 = select i1 %cmp9, float %sel8, float 9.0156 %sel10 = select i1 %cmp10, float %sel9, float 10.0157 158 ret float %sel10159}160 161; Check comparison with zero.162define i64 @f8(i64 %a, i64 %b, float %f) {163; CHECK-LABEL: f8:164; CHECK: ltebr %f0, %f0165; CHECK-SCALAR-NEXT: ber %r14166; CHECK-SCALAR: lgr %r2, %r3167; CHECK-VECTOR-NEXT: locgrne %r2, %r3168; CHECK: br %r14169 %cond = fcmp oeq float %f, 0.0170 %res = select i1 %cond, i64 %a, i64 %b171 ret i64 %res172}173 174; Check the comparison can be reversed if that allows CEB to be used,175; first with oeq.176define i64 @f9(i64 %a, i64 %b, float %f2, ptr %ptr) {177; CHECK-LABEL: f9:178; CHECK: ceb %f0, 0(%r4)179; CHECK-SCALAR-NEXT: ber %r14180; CHECK-SCALAR: lgr %r2, %r3181; CHECK-VECTOR-NEXT: locgrne %r2, %r3182; CHECK: br %r14183 %f1 = load float, ptr %ptr184 %cond = fcmp oeq float %f1, %f2185 %res = select i1 %cond, i64 %a, i64 %b186 ret i64 %res187}188 189; ...then one.190define i64 @f10(i64 %a, i64 %b, float %f2, ptr %ptr) {191; CHECK-LABEL: f10:192; CHECK: ceb %f0, 0(%r4)193; CHECK-SCALAR-NEXT: blhr %r14194; CHECK-SCALAR: lgr %r2, %r3195; CHECK-VECTOR-NEXT: locgrnlh %r2, %r3196; CHECK: br %r14197 %f1 = load float, ptr %ptr198 %cond = fcmp one float %f1, %f2199 %res = select i1 %cond, i64 %a, i64 %b200 ret i64 %res201}202 203; ...then olt.204define i64 @f11(i64 %a, i64 %b, float %f2, ptr %ptr) {205; CHECK-LABEL: f11:206; CHECK: ceb %f0, 0(%r4)207; CHECK-SCALAR-NEXT: bhr %r14208; CHECK-SCALAR: lgr %r2, %r3209; CHECK-VECTOR-NEXT: locgrnh %r2, %r3210; CHECK: br %r14211 %f1 = load float, ptr %ptr212 %cond = fcmp olt float %f1, %f2213 %res = select i1 %cond, i64 %a, i64 %b214 ret i64 %res215}216 217; ...then ole.218define i64 @f12(i64 %a, i64 %b, float %f2, ptr %ptr) {219; CHECK-LABEL: f12:220; CHECK: ceb %f0, 0(%r4)221; CHECK-SCALAR-NEXT: bher %r14222; CHECK-SCALAR: lgr %r2, %r3223; CHECK-VECTOR-NEXT: locgrnhe %r2, %r3224; CHECK: br %r14225 %f1 = load float, ptr %ptr226 %cond = fcmp ole float %f1, %f2227 %res = select i1 %cond, i64 %a, i64 %b228 ret i64 %res229}230 231; ...then oge.232define i64 @f13(i64 %a, i64 %b, float %f2, ptr %ptr) {233; CHECK-LABEL: f13:234; CHECK: ceb %f0, 0(%r4)235; CHECK-SCALAR-NEXT: bler %r14236; CHECK-SCALAR: lgr %r2, %r3237; CHECK-VECTOR-NEXT: locgrnle %r2, %r3238; CHECK: br %r14239 %f1 = load float, ptr %ptr240 %cond = fcmp oge float %f1, %f2241 %res = select i1 %cond, i64 %a, i64 %b242 ret i64 %res243}244 245; ...then ogt.246define i64 @f14(i64 %a, i64 %b, float %f2, ptr %ptr) {247; CHECK-LABEL: f14:248; CHECK: ceb %f0, 0(%r4)249; CHECK-SCALAR-NEXT: blr %r14250; CHECK-SCALAR: lgr %r2, %r3251; CHECK-VECTOR-NEXT: locgrnl %r2, %r3252; CHECK: br %r14253 %f1 = load float, ptr %ptr254 %cond = fcmp ogt float %f1, %f2255 %res = select i1 %cond, i64 %a, i64 %b256 ret i64 %res257}258 259; ...then ueq.260define i64 @f15(i64 %a, i64 %b, float %f2, ptr %ptr) {261; CHECK-LABEL: f15:262; CHECK: ceb %f0, 0(%r4)263; CHECK-SCALAR-NEXT: bnlhr %r14264; CHECK-SCALAR: lgr %r2, %r3265; CHECK-VECTOR-NEXT: locgrlh %r2, %r3266; CHECK: br %r14267 %f1 = load float, ptr %ptr268 %cond = fcmp ueq float %f1, %f2269 %res = select i1 %cond, i64 %a, i64 %b270 ret i64 %res271}272 273; ...then une.274define i64 @f16(i64 %a, i64 %b, float %f2, ptr %ptr) {275; CHECK-LABEL: f16:276; CHECK: ceb %f0, 0(%r4)277; CHECK-SCALAR-NEXT: bner %r14278; CHECK-SCALAR: lgr %r2, %r3279; CHECK-VECTOR-NEXT: locgre %r2, %r3280; CHECK: br %r14281 %f1 = load float, ptr %ptr282 %cond = fcmp une float %f1, %f2283 %res = select i1 %cond, i64 %a, i64 %b284 ret i64 %res285}286 287; ...then ult.288define i64 @f17(i64 %a, i64 %b, float %f2, ptr %ptr) {289; CHECK-LABEL: f17:290; CHECK: ceb %f0, 0(%r4)291; CHECK-SCALAR-NEXT: bnler %r14292; CHECK-SCALAR: lgr %r2, %r3293; CHECK-VECTOR-NEXT: locgrle %r2, %r3294; CHECK: br %r14295 %f1 = load float, ptr %ptr296 %cond = fcmp ult float %f1, %f2297 %res = select i1 %cond, i64 %a, i64 %b298 ret i64 %res299}300 301; ...then ule.302define i64 @f18(i64 %a, i64 %b, float %f2, ptr %ptr) {303; CHECK-LABEL: f18:304; CHECK: ceb %f0, 0(%r4)305; CHECK-SCALAR-NEXT: bnlr %r14306; CHECK-SCALAR: lgr %r2, %r3307; CHECK-VECTOR-NEXT: locgrl %r2, %r3308; CHECK: br %r14309 %f1 = load float, ptr %ptr310 %cond = fcmp ule float %f1, %f2311 %res = select i1 %cond, i64 %a, i64 %b312 ret i64 %res313}314 315; ...then uge.316define i64 @f19(i64 %a, i64 %b, float %f2, ptr %ptr) {317; CHECK-LABEL: f19:318; CHECK: ceb %f0, 0(%r4)319; CHECK-SCALAR-NEXT: bnhr %r14320; CHECK-SCALAR: lgr %r2, %r3321; CHECK-VECTOR-NEXT: locgrh %r2, %r3322; CHECK: br %r14323 %f1 = load float, ptr %ptr324 %cond = fcmp uge float %f1, %f2325 %res = select i1 %cond, i64 %a, i64 %b326 ret i64 %res327}328 329; ...then ugt.330define i64 @f20(i64 %a, i64 %b, float %f2, ptr %ptr) {331; CHECK-LABEL: f20:332; CHECK: ceb %f0, 0(%r4)333; CHECK-SCALAR-NEXT: bnher %r14334; CHECK-SCALAR: lgr %r2, %r3335; CHECK-VECTOR-NEXT: locgrhe %r2, %r3336; CHECK: br %r14337 %f1 = load float, ptr %ptr338 %cond = fcmp ugt float %f1, %f2339 %res = select i1 %cond, i64 %a, i64 %b340 ret i64 %res341}342