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1; Test 64-bit floating-point comparison.  The tests assume a z10 implementation2; of select, using conditional branches rather than LOCGR.3;4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \5; RUN:   | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s6; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 -verify-machineinstrs\7; RUN:   | FileCheck -check-prefix=CHECK -check-prefix=CHECK-VECTOR %s8 9declare double @foo()10 11; Check comparison with registers.12define i64 @f1(i64 %a, i64 %b, double %f1, double %f2) {13; CHECK-LABEL: f1:14; CHECK: cdbr %f0, %f215; CHECK-SCALAR-NEXT: ber %r1416; CHECK-SCALAR: lgr %r2, %r317; CHECK-VECTOR-NEXT: locgrne %r2, %r318; CHECK: br %r1419  %cond = fcmp oeq double %f1, %f220  %res = select i1 %cond, i64 %a, i64 %b21  ret i64 %res22}23 24; Check the low end of the CDB range.25define i64 @f2(i64 %a, i64 %b, double %f1, ptr %ptr) {26; CHECK-LABEL: f2:27; CHECK: cdb %f0, 0(%r4)28; CHECK-SCALAR-NEXT: ber %r1429; CHECK-SCALAR: lgr %r2, %r330; CHECK-VECTOR-NEXT: locgrne %r2, %r331; CHECK: br %r1432  %f2 = load double, ptr %ptr33  %cond = fcmp oeq double %f1, %f234  %res = select i1 %cond, i64 %a, i64 %b35  ret i64 %res36}37 38; Check the high end of the aligned CDB range.39define i64 @f3(i64 %a, i64 %b, double %f1, ptr %base) {40; CHECK-LABEL: f3:41; CHECK: cdb %f0, 4088(%r4)42; CHECK-SCALAR-NEXT: ber %r1443; CHECK-SCALAR: lgr %r2, %r344; CHECK-VECTOR-NEXT: locgrne %r2, %r345; CHECK: br %r1446  %ptr = getelementptr double, ptr %base, i64 51147  %f2 = load double, ptr %ptr48  %cond = fcmp oeq double %f1, %f249  %res = select i1 %cond, i64 %a, i64 %b50  ret i64 %res51}52 53; Check the next doubleword up, which needs separate address logic.54; Other sequences besides this one would be OK.55define i64 @f4(i64 %a, i64 %b, double %f1, ptr %base) {56; CHECK-LABEL: f4:57; CHECK: aghi %r4, 409658; CHECK: cdb %f0, 0(%r4)59; CHECK-SCALAR-NEXT: ber %r1460; CHECK-SCALAR: lgr %r2, %r361; CHECK-VECTOR-NEXT: locgrne %r2, %r362; CHECK: br %r1463  %ptr = getelementptr double, ptr %base, i64 51264  %f2 = load double, ptr %ptr65  %cond = fcmp oeq double %f1, %f266  %res = select i1 %cond, i64 %a, i64 %b67  ret i64 %res68}69 70; Check negative displacements, which also need separate address logic.71define i64 @f5(i64 %a, i64 %b, double %f1, ptr %base) {72; CHECK-LABEL: f5:73; CHECK: aghi %r4, -874; CHECK: cdb %f0, 0(%r4)75; CHECK-SCALAR-NEXT: ber %r1476; CHECK-SCALAR: lgr %r2, %r377; CHECK-VECTOR-NEXT: locgrne %r2, %r378; CHECK: br %r1479  %ptr = getelementptr double, ptr %base, i64 -180  %f2 = load double, ptr %ptr81  %cond = fcmp oeq double %f1, %f282  %res = select i1 %cond, i64 %a, i64 %b83  ret i64 %res84}85 86; Check that CDB allows indices.87define i64 @f6(i64 %a, i64 %b, double %f1, ptr %base, i64 %index) {88; CHECK-LABEL: f6:89; CHECK: sllg %r1, %r5, 390; CHECK: cdb %f0, 800(%r1,%r4)91; CHECK-SCALAR-NEXT: ber %r1492; CHECK-SCALAR: lgr %r2, %r393; CHECK-VECTOR-NEXT: locgrne %r2, %r394; CHECK: br %r1495  %ptr1 = getelementptr double, ptr %base, i64 %index96  %ptr2 = getelementptr double, ptr %ptr1, i64 10097  %f2 = load double, ptr %ptr298  %cond = fcmp oeq double %f1, %f299  %res = select i1 %cond, i64 %a, i64 %b100  ret i64 %res101}102 103; Check that comparisons of spilled values can use CDB rather than CDBR.104define double @f7(ptr %ptr0) {105; CHECK-LABEL: f7:106; CHECK: brasl %r14, foo@PLT107; CHECK-SCALAR: cdb {{%f[0-9]+}}, 160(%r15)108; CHECK: br %r14109  %ptr1 = getelementptr double, ptr %ptr0, i64 2110  %ptr2 = getelementptr double, ptr %ptr0, i64 4111  %ptr3 = getelementptr double, ptr %ptr0, i64 6112  %ptr4 = getelementptr double, ptr %ptr0, i64 8113  %ptr5 = getelementptr double, ptr %ptr0, i64 10114  %ptr6 = getelementptr double, ptr %ptr0, i64 12115  %ptr7 = getelementptr double, ptr %ptr0, i64 14116  %ptr8 = getelementptr double, ptr %ptr0, i64 16117  %ptr9 = getelementptr double, ptr %ptr0, i64 18118  %ptr10 = getelementptr double, ptr %ptr0, i64 20119 120  %val0 = load double, ptr %ptr0121  %val1 = load double, ptr %ptr1122  %val2 = load double, ptr %ptr2123  %val3 = load double, ptr %ptr3124  %val4 = load double, ptr %ptr4125  %val5 = load double, ptr %ptr5126  %val6 = load double, ptr %ptr6127  %val7 = load double, ptr %ptr7128  %val8 = load double, ptr %ptr8129  %val9 = load double, ptr %ptr9130  %val10 = load double, ptr %ptr10131 132  %ret = call double @foo()133 134  %cmp0 = fcmp olt double %ret, %val0135  %cmp1 = fcmp olt double %ret, %val1136  %cmp2 = fcmp olt double %ret, %val2137  %cmp3 = fcmp olt double %ret, %val3138  %cmp4 = fcmp olt double %ret, %val4139  %cmp5 = fcmp olt double %ret, %val5140  %cmp6 = fcmp olt double %ret, %val6141  %cmp7 = fcmp olt double %ret, %val7142  %cmp8 = fcmp olt double %ret, %val8143  %cmp9 = fcmp olt double %ret, %val9144  %cmp10 = fcmp olt double %ret, %val10145 146  %sel0 = select i1 %cmp0, double %ret, double 0.0147  %sel1 = select i1 %cmp1, double %sel0, double 1.0148  %sel2 = select i1 %cmp2, double %sel1, double 2.0149  %sel3 = select i1 %cmp3, double %sel2, double 3.0150  %sel4 = select i1 %cmp4, double %sel3, double 4.0151  %sel5 = select i1 %cmp5, double %sel4, double 5.0152  %sel6 = select i1 %cmp6, double %sel5, double 6.0153  %sel7 = select i1 %cmp7, double %sel6, double 7.0154  %sel8 = select i1 %cmp8, double %sel7, double 8.0155  %sel9 = select i1 %cmp9, double %sel8, double 9.0156  %sel10 = select i1 %cmp10, double %sel9, double 10.0157 158  ret double %sel10159}160 161; Check comparison with zero.162define i64 @f8(i64 %a, i64 %b, double %f) {163; CHECK-LABEL: f8:164; CHECK-SCALAR: ltdbr %f0, %f0165; CHECK-SCALAR-NEXT: ber %r14166; CHECK-SCALAR: lgr %r2, %r3167; CHECK-VECTOR: ltdbr %f0, %f0168; CHECK-VECTOR-NEXT: locgrne %r2, %r3169; CHECK: br %r14170  %cond = fcmp oeq double %f, 0.0171  %res = select i1 %cond, i64 %a, i64 %b172  ret i64 %res173}174 175; Check the comparison can be reversed if that allows CDB to be used,176define i64 @f9(i64 %a, i64 %b, double %f2, ptr %ptr) {177; CHECK-LABEL: f9:178; CHECK: cdb %f0, 0(%r4)179; CHECK-SCALAR-NEXT: blr %r14180; CHECK-SCALAR: lgr %r2, %r3181; CHECK-VECTOR-NEXT: locgrnl %r2, %r3182; CHECK: br %r14183  %f1 = load double, ptr %ptr184  %cond = fcmp ogt double %f1, %f2185  %res = select i1 %cond, i64 %a, i64 %b186  ret i64 %res187}188