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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; Test moves between FPRs and GPRs. The 32-bit cases test the z103; implementation, which has no high-word support.4;5; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s6 7declare i64 @foo()8declare double @bar()9@dptr = external global double10@iptr = external global i6411 12; Test 32-bit moves from GPRs to FPRs. The GPR must be moved into the high13; 32 bits of the FPR.14define float @f1(i32 %a) {15; CHECK-LABEL: f1:16; CHECK: # %bb.0:17; CHECK-NEXT: # kill: def $r2l killed $r2l def $r2d18; CHECK-NEXT: sllg %r0, %r2, 3219; CHECK-NEXT: ldgr %f0, %r020; CHECK-NEXT: # kill: def $f0s killed $f0s killed $f0d21; CHECK-NEXT: br %r1422 %res = bitcast i32 %a to float23 ret float %res24}25 26; Like f1, but create a situation where the shift can be folded with27; surrounding code.28define float @f2(i64 %big) {29; CHECK-LABEL: f2:30; CHECK: # %bb.0:31; CHECK-NEXT: risbg %r0, %r2, 0, 159, 3132; CHECK-NEXT: ldgr %f0, %r033; CHECK-NEXT: # kill: def $f0s killed $f0s killed $f0d34; CHECK-NEXT: br %r1435 %shift = lshr i64 %big, 136 %a = trunc i64 %shift to i3237 %res = bitcast i32 %a to float38 ret float %res39}40 41; Another example of the same thing.42define float @f3(i64 %big) {43; CHECK-LABEL: f3:44; CHECK: # %bb.0:45; CHECK-NEXT: risbg %r0, %r2, 0, 159, 246; CHECK-NEXT: ldgr %f0, %r047; CHECK-NEXT: # kill: def $f0s killed $f0s killed $f0d48; CHECK-NEXT: br %r1449 %shift = ashr i64 %big, 3050 %a = trunc i64 %shift to i3251 %res = bitcast i32 %a to float52 ret float %res53}54 55; Like f1, but the value to transfer is already in the high 32 bits.56define float @f4(i64 %big) {57; CHECK-LABEL: f4:58; CHECK: # %bb.0:59; CHECK-NEXT: nilf %r2, 060; CHECK-NEXT: ldgr %f0, %r261; CHECK-NEXT: # kill: def $f0s killed $f0s killed $f0d62; CHECK-NEXT: br %r1463 %shift = ashr i64 %big, 3264 %a = trunc i64 %shift to i3265 %res = bitcast i32 %a to float66 ret float %res67}68 69; Test 64-bit moves from GPRs to FPRs.70define double @f5(i64 %a) {71; CHECK-LABEL: f5:72; CHECK: # %bb.0:73; CHECK-NEXT: ldgr %f0, %r274; CHECK-NEXT: br %r1475 %res = bitcast i64 %a to double76 ret double %res77}78 79; Test 128-bit moves from GPRs to FPRs. i128 isn't a legitimate type,80; so this goes through memory.81define void @f6(ptr %a, ptr %b) {82; CHECK-LABEL: f6:83; CHECK: # %bb.0:84; CHECK-NEXT: lg %r0, 8(%r3)85; CHECK-NEXT: lg %r1, 0(%r3)86; CHECK-NEXT: stg %r0, 8(%r2)87; CHECK-NEXT: stg %r1, 0(%r2)88; CHECK-NEXT: br %r1489 %val = load i128, ptr %b90 %res = bitcast i128 %val to fp12891 store fp128 %res, ptr %a92 ret void93}94 95; Test 32-bit moves from FPRs to GPRs. The high 32 bits of the FPR should96; be moved into the low 32 bits of the GPR.97define i32 @f7(float %a) {98; CHECK-LABEL: f7:99; CHECK: # %bb.0:100; CHECK-NEXT: # kill: def $f0s killed $f0s def $f0d101; CHECK-NEXT: lgdr %r0, %f0102; CHECK-NEXT: srlg %r2, %r0, 32103; CHECK-NEXT: # kill: def $r2l killed $r2l killed $r2d104; CHECK-NEXT: br %r14105 %res = bitcast float %a to i32106 ret i32 %res107}108 109; Test 64-bit moves from FPRs to GPRs.110define i64 @f8(double %a) {111; CHECK-LABEL: f8:112; CHECK: # %bb.0:113; CHECK-NEXT: lgdr %r2, %f0114; CHECK-NEXT: br %r14115 %res = bitcast double %a to i64116 ret i64 %res117}118 119; Test 128-bit moves from FPRs to GPRs, with the same restriction as f6.120define void @f9(ptr %a, ptr %b) {121; CHECK-LABEL: f9:122; CHECK: # %bb.0:123; CHECK-NEXT: ld %f0, 0(%r2)124; CHECK-NEXT: ld %f2, 8(%r2)125; CHECK-NEXT: std %f0, 0(%r3)126; CHECK-NEXT: std %f2, 8(%r3)127; CHECK-NEXT: br %r14128 %val = load fp128, ptr %a129 %res = bitcast fp128 %val to i128130 store i128 %res, ptr %b131 ret void132}133 134; Test cases where the destination of an LGDR needs to be spilled.135; We shouldn't have any integer stack stores or floating-point loads.136define void @f10(double %extra) {137; CHECK-LABEL: f10:138; CHECK: # %bb.0: # %entry139; CHECK-NEXT: stmg %r6, %r15, 48(%r15)140; CHECK-NEXT: .cfi_offset %r6, -112141; CHECK-NEXT: .cfi_offset %r7, -104142; CHECK-NEXT: .cfi_offset %r8, -96143; CHECK-NEXT: .cfi_offset %r9, -88144; CHECK-NEXT: .cfi_offset %r10, -80145; CHECK-NEXT: .cfi_offset %r11, -72146; CHECK-NEXT: .cfi_offset %r12, -64147; CHECK-NEXT: .cfi_offset %r13, -56148; CHECK-NEXT: .cfi_offset %r14, -48149; CHECK-NEXT: .cfi_offset %r15, -40150; CHECK-NEXT: aghi %r15, -184151; CHECK-NEXT: .cfi_def_cfa_offset 344152; CHECK-NEXT: lgrl %r1, dptr@GOT153; CHECK-NEXT: ldr %f1, %f0154; CHECK-NEXT: adb %f1, 0(%r1)155; CHECK-NEXT: ldr %f2, %f0156; CHECK-NEXT: adb %f2, 0(%r1)157; CHECK-NEXT: ldr %f3, %f0158; CHECK-NEXT: adb %f3, 0(%r1)159; CHECK-NEXT: std %f1, 176(%r15) # 8-byte Spill160; CHECK-NEXT: std %f2, 168(%r15) # 8-byte Spill161; CHECK-NEXT: std %f3, 160(%r15) # 8-byte Spill162; CHECK-NEXT: ldr %f1, %f0163; CHECK-NEXT: adb %f1, 0(%r1)164; CHECK-NEXT: ldr %f2, %f0165; CHECK-NEXT: adb %f2, 0(%r1)166; CHECK-NEXT: ldr %f3, %f0167; CHECK-NEXT: adb %f3, 0(%r1)168; CHECK-NEXT: ldr %f4, %f0169; CHECK-NEXT: adb %f4, 0(%r1)170; CHECK-NEXT: lgdr %r10, %f1171; CHECK-NEXT: lgdr %r9, %f2172; CHECK-NEXT: lgdr %r8, %f3173; CHECK-NEXT: lgdr %r7, %f4174; CHECK-NEXT: ldr %f1, %f0175; CHECK-NEXT: adb %f1, 0(%r1)176; CHECK-NEXT: ldr %f2, %f0177; CHECK-NEXT: adb %f2, 0(%r1)178; CHECK-NEXT: adb %f0, 0(%r1)179; CHECK-NEXT: lgrl %r6, iptr@GOT180; CHECK-NEXT: lgdr %r13, %f1181; CHECK-NEXT: lgdr %r12, %f2182; CHECK-NEXT: lgdr %r11, %f0183; CHECK-NEXT: .LBB9_1: # %loop184; CHECK-NEXT: # =>This Inner Loop Header: Depth=1185; CHECK-NEXT: brasl %r14, foo@PLT186; CHECK-NEXT: lgr %r0, %r2187; CHECK-NEXT: og %r0, 176(%r15) # 8-byte Folded Reload188; CHECK-NEXT: og %r0, 168(%r15) # 8-byte Folded Reload189; CHECK-NEXT: og %r0, 160(%r15) # 8-byte Folded Reload190; CHECK-NEXT: ogr %r0, %r10191; CHECK-NEXT: ogr %r0, %r9192; CHECK-NEXT: ogr %r0, %r8193; CHECK-NEXT: ogr %r0, %r7194; CHECK-NEXT: ogr %r0, %r13195; CHECK-NEXT: ogr %r0, %r12196; CHECK-NEXT: ogr %r0, %r11197; CHECK-NEXT: stg %r0, 0(%r6)198; CHECK-NEXT: cgijlh %r2, 1, .LBB9_1199; CHECK-NEXT: # %bb.2: # %exit200; CHECK-NEXT: lmg %r6, %r15, 232(%r15)201; CHECK-NEXT: br %r14202entry:203 %double0 = load volatile double, ptr@dptr204 %biased0 = fadd double %double0, %extra205 %int0 = bitcast double %biased0 to i64206 %double1 = load volatile double, ptr@dptr207 %biased1 = fadd double %double1, %extra208 %int1 = bitcast double %biased1 to i64209 %double2 = load volatile double, ptr@dptr210 %biased2 = fadd double %double2, %extra211 %int2 = bitcast double %biased2 to i64212 %double3 = load volatile double, ptr@dptr213 %biased3 = fadd double %double3, %extra214 %int3 = bitcast double %biased3 to i64215 %double4 = load volatile double, ptr@dptr216 %biased4 = fadd double %double4, %extra217 %int4 = bitcast double %biased4 to i64218 %double5 = load volatile double, ptr@dptr219 %biased5 = fadd double %double5, %extra220 %int5 = bitcast double %biased5 to i64221 %double6 = load volatile double, ptr@dptr222 %biased6 = fadd double %double6, %extra223 %int6 = bitcast double %biased6 to i64224 %double7 = load volatile double, ptr@dptr225 %biased7 = fadd double %double7, %extra226 %int7 = bitcast double %biased7 to i64227 %double8 = load volatile double, ptr@dptr228 %biased8 = fadd double %double8, %extra229 %int8 = bitcast double %biased8 to i64230 %double9 = load volatile double, ptr@dptr231 %biased9 = fadd double %double9, %extra232 %int9 = bitcast double %biased9 to i64233 br label %loop234 235loop:236 %start = call i64 @foo()237 %or0 = or i64 %start, %int0238 %or1 = or i64 %or0, %int1239 %or2 = or i64 %or1, %int2240 %or3 = or i64 %or2, %int3241 %or4 = or i64 %or3, %int4242 %or5 = or i64 %or4, %int5243 %or6 = or i64 %or5, %int6244 %or7 = or i64 %or6, %int7245 %or8 = or i64 %or7, %int8246 %or9 = or i64 %or8, %int9247 store i64 %or9, ptr@iptr248 %cont = icmp ne i64 %start, 1249 br i1 %cont, label %loop, label %exit250 251exit:252 ret void253}254 255; ...likewise LDGR, with the requirements the other way around.256define void @f11(i64 %mask) {257; CHECK-LABEL: f11:258; CHECK: # %bb.0: # %entry259; CHECK-NEXT: stmg %r12, %r15, 96(%r15)260; CHECK-NEXT: .cfi_offset %r12, -64261; CHECK-NEXT: .cfi_offset %r13, -56262; CHECK-NEXT: .cfi_offset %r14, -48263; CHECK-NEXT: .cfi_offset %r15, -40264; CHECK-NEXT: aghi %r15, -240265; CHECK-NEXT: .cfi_def_cfa_offset 400266; CHECK-NEXT: std %f8, 232(%r15) # 8-byte Spill267; CHECK-NEXT: std %f9, 224(%r15) # 8-byte Spill268; CHECK-NEXT: std %f10, 216(%r15) # 8-byte Spill269; CHECK-NEXT: std %f11, 208(%r15) # 8-byte Spill270; CHECK-NEXT: std %f12, 200(%r15) # 8-byte Spill271; CHECK-NEXT: std %f13, 192(%r15) # 8-byte Spill272; CHECK-NEXT: std %f14, 184(%r15) # 8-byte Spill273; CHECK-NEXT: std %f15, 176(%r15) # 8-byte Spill274; CHECK-NEXT: .cfi_offset %f8, -168275; CHECK-NEXT: .cfi_offset %f9, -176276; CHECK-NEXT: .cfi_offset %f10, -184277; CHECK-NEXT: .cfi_offset %f11, -192278; CHECK-NEXT: .cfi_offset %f12, -200279; CHECK-NEXT: .cfi_offset %f13, -208280; CHECK-NEXT: .cfi_offset %f14, -216281; CHECK-NEXT: .cfi_offset %f15, -224282; CHECK-NEXT: lgrl %r1, iptr@GOT283; CHECK-NEXT: lgr %r0, %r2284; CHECK-NEXT: ng %r0, 0(%r1)285; CHECK-NEXT: lgr %r3, %r2286; CHECK-NEXT: ng %r3, 0(%r1)287; CHECK-NEXT: lgr %r4, %r2288; CHECK-NEXT: ng %r4, 0(%r1)289; CHECK-NEXT: stg %r0, 168(%r15) # 8-byte Spill290; CHECK-NEXT: stg %r3, 160(%r15) # 8-byte Spill291; CHECK-NEXT: lgr %r0, %r2292; CHECK-NEXT: ng %r0, 0(%r1)293; CHECK-NEXT: ldgr %f10, %r4294; CHECK-NEXT: lgr %r3, %r2295; CHECK-NEXT: ng %r3, 0(%r1)296; CHECK-NEXT: lgr %r4, %r2297; CHECK-NEXT: ng %r4, 0(%r1)298; CHECK-NEXT: ldgr %f11, %r0299; CHECK-NEXT: lgr %r0, %r2300; CHECK-NEXT: ng %r0, 0(%r1)301; CHECK-NEXT: ldgr %f12, %r3302; CHECK-NEXT: ldgr %f13, %r4303; CHECK-NEXT: lgr %r3, %r2304; CHECK-NEXT: ng %r3, 0(%r1)305; CHECK-NEXT: ldgr %f14, %r0306; CHECK-NEXT: lgr %r0, %r2307; CHECK-NEXT: ng %r0, 0(%r1)308; CHECK-NEXT: ng %r2, 0(%r1)309; CHECK-NEXT: ldgr %f15, %r3310; CHECK-NEXT: lgrl %r13, dptr@GOT311; CHECK-NEXT: ldgr %f8, %r0312; CHECK-NEXT: ldgr %f9, %r2313; CHECK-NEXT: larl %r12, .LCPI10_0314; CHECK-NEXT: .LBB10_1: # %loop315; CHECK-NEXT: # =>This Inner Loop Header: Depth=1316; CHECK-NEXT: brasl %r14, bar@PLT317; CHECK-NEXT: ldr %f1, %f0318; CHECK-NEXT: adb %f1, 168(%r15) # 8-byte Folded Reload319; CHECK-NEXT: adb %f1, 160(%r15) # 8-byte Folded Reload320; CHECK-NEXT: adbr %f1, %f10321; CHECK-NEXT: adbr %f1, %f11322; CHECK-NEXT: adbr %f1, %f12323; CHECK-NEXT: adbr %f1, %f13324; CHECK-NEXT: adbr %f1, %f14325; CHECK-NEXT: adbr %f1, %f15326; CHECK-NEXT: adbr %f1, %f8327; CHECK-NEXT: adbr %f1, %f9328; CHECK-NEXT: cdb %f0, 0(%r12)329; CHECK-NEXT: std %f1, 0(%r13)330; CHECK-NEXT: jlh .LBB10_1331; CHECK-NEXT: # %bb.2: # %exit332; CHECK-NEXT: ld %f8, 232(%r15) # 8-byte Reload333; CHECK-NEXT: ld %f9, 224(%r15) # 8-byte Reload334; CHECK-NEXT: ld %f10, 216(%r15) # 8-byte Reload335; CHECK-NEXT: ld %f11, 208(%r15) # 8-byte Reload336; CHECK-NEXT: ld %f12, 200(%r15) # 8-byte Reload337; CHECK-NEXT: ld %f13, 192(%r15) # 8-byte Reload338; CHECK-NEXT: ld %f14, 184(%r15) # 8-byte Reload339; CHECK-NEXT: ld %f15, 176(%r15) # 8-byte Reload340; CHECK-NEXT: lmg %r12, %r15, 336(%r15)341; CHECK-NEXT: br %r14342entry:343 %int0 = load volatile i64, ptr@iptr344 %masked0 = and i64 %int0, %mask345 %double0 = bitcast i64 %masked0 to double346 %int1 = load volatile i64, ptr@iptr347 %masked1 = and i64 %int1, %mask348 %double1 = bitcast i64 %masked1 to double349 %int2 = load volatile i64, ptr@iptr350 %masked2 = and i64 %int2, %mask351 %double2 = bitcast i64 %masked2 to double352 %int3 = load volatile i64, ptr@iptr353 %masked3 = and i64 %int3, %mask354 %double3 = bitcast i64 %masked3 to double355 %int4 = load volatile i64, ptr@iptr356 %masked4 = and i64 %int4, %mask357 %double4 = bitcast i64 %masked4 to double358 %int5 = load volatile i64, ptr@iptr359 %masked5 = and i64 %int5, %mask360 %double5 = bitcast i64 %masked5 to double361 %int6 = load volatile i64, ptr@iptr362 %masked6 = and i64 %int6, %mask363 %double6 = bitcast i64 %masked6 to double364 %int7 = load volatile i64, ptr@iptr365 %masked7 = and i64 %int7, %mask366 %double7 = bitcast i64 %masked7 to double367 %int8 = load volatile i64, ptr@iptr368 %masked8 = and i64 %int8, %mask369 %double8 = bitcast i64 %masked8 to double370 %int9 = load volatile i64, ptr@iptr371 %masked9 = and i64 %int9, %mask372 %double9 = bitcast i64 %masked9 to double373 br label %loop374 375loop:376 %start = call double @bar()377 %add0 = fadd double %start, %double0378 %add1 = fadd double %add0, %double1379 %add2 = fadd double %add1, %double2380 %add3 = fadd double %add2, %double3381 %add4 = fadd double %add3, %double4382 %add5 = fadd double %add4, %double5383 %add6 = fadd double %add5, %double6384 %add7 = fadd double %add6, %double7385 %add8 = fadd double %add7, %double8386 %add9 = fadd double %add8, %double9387 store double %add9, ptr@dptr388 %cont = fcmp one double %start, 1.0389 br i1 %cont, label %loop, label %exit390 391exit:392 ret void393}394 395; Test cases where the source of an LDGR needs to be spilled.396; We shouldn't have any integer stack stores or floating-point loads.397define void @f12() {398; CHECK-LABEL: f12:399; CHECK: # %bb.0: # %entry400; CHECK-NEXT: stmg %r6, %r15, 48(%r15)401; CHECK-NEXT: .cfi_offset %r6, -112402; CHECK-NEXT: .cfi_offset %r7, -104403; CHECK-NEXT: .cfi_offset %r8, -96404; CHECK-NEXT: .cfi_offset %r9, -88405; CHECK-NEXT: .cfi_offset %r10, -80406; CHECK-NEXT: .cfi_offset %r11, -72407; CHECK-NEXT: .cfi_offset %r12, -64408; CHECK-NEXT: .cfi_offset %r13, -56409; CHECK-NEXT: .cfi_offset %r14, -48410; CHECK-NEXT: .cfi_offset %r15, -40411; CHECK-NEXT: aghi %r15, -176412; CHECK-NEXT: .cfi_def_cfa_offset 336413; CHECK-NEXT: lghi %r12, 0414; CHECK-NEXT: lghi %r13, 0415; CHECK-NEXT: lghi %r6, 0416; CHECK-NEXT: lghi %r7, 0417; CHECK-NEXT: lghi %r8, 0418; CHECK-NEXT: lghi %r9, 0419; CHECK-NEXT: lghi %r10, 0420; CHECK-NEXT: lghi %r11, 0421; CHECK-NEXT: mvghi 160(%r15), 0 # 8-byte Folded Spill422; CHECK-NEXT: mvghi 168(%r15), 0 # 8-byte Folded Spill423; CHECK-NEXT: .LBB11_1: # %loop424; CHECK-NEXT: # =>This Inner Loop Header: Depth=1425; CHECK-NEXT: brasl %r14, foo@PLT426; CHECK-NEXT: agr %r12, %r2427; CHECK-NEXT: agr %r13, %r2428; CHECK-NEXT: agr %r6, %r2429; CHECK-NEXT: agr %r7, %r2430; CHECK-NEXT: agr %r8, %r2431; CHECK-NEXT: agr %r9, %r2432; CHECK-NEXT: agr %r10, %r2433; CHECK-NEXT: agr %r11, %r2434; CHECK-NEXT: lg %r0, 160(%r15) # 8-byte Reload435; CHECK-NEXT: agr %r0, %r2436; CHECK-NEXT: stg %r0, 160(%r15) # 8-byte Spill437; CHECK-NEXT: lg %r0, 168(%r15) # 8-byte Reload438; CHECK-NEXT: agr %r0, %r2439; CHECK-NEXT: stg %r0, 168(%r15) # 8-byte Spill440; CHECK-NEXT: cgijlh %r2, 1, .LBB11_1441; CHECK-NEXT: # %bb.2: # %exit442; CHECK-NEXT: brasl %r14, foo@PLT443; CHECK-NEXT: lgrl %r1, dptr@GOT444; CHECK-NEXT: ld %f0, 0(%r1)445; CHECK-NEXT: ldgr %f1, %r12446; CHECK-NEXT: mdbr %f1, %f0447; CHECK-NEXT: std %f1, 0(%r1)448; CHECK-NEXT: ldgr %f1, %r13449; CHECK-NEXT: mdbr %f1, %f0450; CHECK-NEXT: std %f1, 0(%r1)451; CHECK-NEXT: ldgr %f1, %r6452; CHECK-NEXT: mdbr %f1, %f0453; CHECK-NEXT: std %f1, 0(%r1)454; CHECK-NEXT: ldgr %f1, %r7455; CHECK-NEXT: mdbr %f1, %f0456; CHECK-NEXT: std %f1, 0(%r1)457; CHECK-NEXT: ldgr %f1, %r8458; CHECK-NEXT: mdbr %f1, %f0459; CHECK-NEXT: std %f1, 0(%r1)460; CHECK-NEXT: ldgr %f1, %r9461; CHECK-NEXT: mdbr %f1, %f0462; CHECK-NEXT: std %f1, 0(%r1)463; CHECK-NEXT: ldgr %f1, %r10464; CHECK-NEXT: mdbr %f1, %f0465; CHECK-NEXT: std %f1, 0(%r1)466; CHECK-NEXT: ldgr %f1, %r11467; CHECK-NEXT: mdbr %f1, %f0468; CHECK-NEXT: std %f1, 0(%r1)469; CHECK-NEXT: ld %f1, 160(%r15) # 8-byte Reload470; CHECK-NEXT: mdbr %f1, %f0471; CHECK-NEXT: std %f1, 0(%r1)472; CHECK-NEXT: ld %f1, 168(%r15) # 8-byte Reload473; CHECK-NEXT: mdbr %f1, %f0474; CHECK-NEXT: std %f1, 0(%r1)475; CHECK-NEXT: brasl %r14, foo@PLT476; CHECK-NEXT: lmg %r6, %r15, 224(%r15)477; CHECK-NEXT: br %r14478entry:479 br label %loop480 481loop:482 %int0 = phi i64 [ 0, %entry ], [ %add0, %loop ]483 %int1 = phi i64 [ 0, %entry ], [ %add1, %loop ]484 %int2 = phi i64 [ 0, %entry ], [ %add2, %loop ]485 %int3 = phi i64 [ 0, %entry ], [ %add3, %loop ]486 %int4 = phi i64 [ 0, %entry ], [ %add4, %loop ]487 %int5 = phi i64 [ 0, %entry ], [ %add5, %loop ]488 %int6 = phi i64 [ 0, %entry ], [ %add6, %loop ]489 %int7 = phi i64 [ 0, %entry ], [ %add7, %loop ]490 %int8 = phi i64 [ 0, %entry ], [ %add8, %loop ]491 %int9 = phi i64 [ 0, %entry ], [ %add9, %loop ]492 493 %bias = call i64 @foo()494 %add0 = add i64 %int0, %bias495 %add1 = add i64 %int1, %bias496 %add2 = add i64 %int2, %bias497 %add3 = add i64 %int3, %bias498 %add4 = add i64 %int4, %bias499 %add5 = add i64 %int5, %bias500 %add6 = add i64 %int6, %bias501 %add7 = add i64 %int7, %bias502 %add8 = add i64 %int8, %bias503 %add9 = add i64 %int9, %bias504 %cont = icmp ne i64 %bias, 1505 br i1 %cont, label %loop, label %exit506 507exit:508 %unused1 = call i64 @foo()509 %factor = load volatile double, ptr@dptr510 511 %conv0 = bitcast i64 %add0 to double512 %mul0 = fmul double %conv0, %factor513 store volatile double %mul0, ptr@dptr514 %conv1 = bitcast i64 %add1 to double515 %mul1 = fmul double %conv1, %factor516 store volatile double %mul1, ptr@dptr517 %conv2 = bitcast i64 %add2 to double518 %mul2 = fmul double %conv2, %factor519 store volatile double %mul2, ptr@dptr520 %conv3 = bitcast i64 %add3 to double521 %mul3 = fmul double %conv3, %factor522 store volatile double %mul3, ptr@dptr523 %conv4 = bitcast i64 %add4 to double524 %mul4 = fmul double %conv4, %factor525 store volatile double %mul4, ptr@dptr526 %conv5 = bitcast i64 %add5 to double527 %mul5 = fmul double %conv5, %factor528 store volatile double %mul5, ptr@dptr529 %conv6 = bitcast i64 %add6 to double530 %mul6 = fmul double %conv6, %factor531 store volatile double %mul6, ptr@dptr532 %conv7 = bitcast i64 %add7 to double533 %mul7 = fmul double %conv7, %factor534 store volatile double %mul7, ptr@dptr535 %conv8 = bitcast i64 %add8 to double536 %mul8 = fmul double %conv8, %factor537 store volatile double %mul8, ptr@dptr538 %conv9 = bitcast i64 %add9 to double539 %mul9 = fmul double %conv9, %factor540 store volatile double %mul9, ptr@dptr541 542 %unused2 = call i64 @foo()543 544 ret void545}546 547; ...likewise LGDR, with the requirements the other way around.548define void @f13() {549; CHECK-LABEL: f13:550; CHECK: # %bb.0: # %entry551; CHECK-NEXT: stmg %r13, %r15, 104(%r15)552; CHECK-NEXT: .cfi_offset %r13, -56553; CHECK-NEXT: .cfi_offset %r14, -48554; CHECK-NEXT: .cfi_offset %r15, -40555; CHECK-NEXT: aghi %r15, -240556; CHECK-NEXT: .cfi_def_cfa_offset 400557; CHECK-NEXT: std %f8, 232(%r15) # 8-byte Spill558; CHECK-NEXT: std %f9, 224(%r15) # 8-byte Spill559; CHECK-NEXT: std %f10, 216(%r15) # 8-byte Spill560; CHECK-NEXT: std %f11, 208(%r15) # 8-byte Spill561; CHECK-NEXT: std %f12, 200(%r15) # 8-byte Spill562; CHECK-NEXT: std %f13, 192(%r15) # 8-byte Spill563; CHECK-NEXT: std %f14, 184(%r15) # 8-byte Spill564; CHECK-NEXT: std %f15, 176(%r15) # 8-byte Spill565; CHECK-NEXT: .cfi_offset %f8, -168566; CHECK-NEXT: .cfi_offset %f9, -176567; CHECK-NEXT: .cfi_offset %f10, -184568; CHECK-NEXT: .cfi_offset %f11, -192569; CHECK-NEXT: .cfi_offset %f12, -200570; CHECK-NEXT: .cfi_offset %f13, -208571; CHECK-NEXT: .cfi_offset %f14, -216572; CHECK-NEXT: .cfi_offset %f15, -224573; CHECK-NEXT: larl %r13, .LCPI12_0574; CHECK-NEXT: ld %f8, 0(%r13)575; CHECK-NEXT: ldr %f9, %f8576; CHECK-NEXT: ldr %f15, %f8577; CHECK-NEXT: ldr %f14, %f8578; CHECK-NEXT: ldr %f13, %f8579; CHECK-NEXT: ldr %f12, %f8580; CHECK-NEXT: ldr %f11, %f8581; CHECK-NEXT: ldr %f10, %f8582; CHECK-NEXT: std %f8, 160(%r15) # 8-byte Spill583; CHECK-NEXT: std %f8, 168(%r15) # 8-byte Spill584; CHECK-NEXT: .LBB12_1: # %loop585; CHECK-NEXT: # =>This Inner Loop Header: Depth=1586; CHECK-NEXT: brasl %r14, bar@PLT587; CHECK-NEXT: mdbr %f8, %f0588; CHECK-NEXT: mdbr %f9, %f0589; CHECK-NEXT: mdbr %f15, %f0590; CHECK-NEXT: mdbr %f14, %f0591; CHECK-NEXT: mdbr %f13, %f0592; CHECK-NEXT: mdbr %f12, %f0593; CHECK-NEXT: cdb %f0, 0(%r13)594; CHECK-NEXT: mdbr %f11, %f0595; CHECK-NEXT: mdbr %f10, %f0596; CHECK-NEXT: ld %f1, 160(%r15) # 8-byte Reload597; CHECK-NEXT: mdbr %f1, %f0598; CHECK-NEXT: std %f1, 160(%r15) # 8-byte Spill599; CHECK-NEXT: ld %f1, 168(%r15) # 8-byte Reload600; CHECK-NEXT: mdbr %f1, %f0601; CHECK-NEXT: std %f1, 168(%r15) # 8-byte Spill602; CHECK-NEXT: jlh .LBB12_1603; CHECK-NEXT: # %bb.2: # %exit604; CHECK-NEXT: brasl %r14, foo@PLT605; CHECK-NEXT: lgrl %r1, iptr@GOT606; CHECK-NEXT: lg %r0, 0(%r1)607; CHECK-NEXT: lgdr %r2, %f8608; CHECK-NEXT: agr %r2, %r0609; CHECK-NEXT: stg %r2, 0(%r1)610; CHECK-NEXT: lgdr %r2, %f9611; CHECK-NEXT: agr %r2, %r0612; CHECK-NEXT: stg %r2, 0(%r1)613; CHECK-NEXT: lgdr %r2, %f15614; CHECK-NEXT: agr %r2, %r0615; CHECK-NEXT: stg %r2, 0(%r1)616; CHECK-NEXT: lgdr %r2, %f14617; CHECK-NEXT: agr %r2, %r0618; CHECK-NEXT: stg %r2, 0(%r1)619; CHECK-NEXT: lgdr %r2, %f13620; CHECK-NEXT: agr %r2, %r0621; CHECK-NEXT: stg %r2, 0(%r1)622; CHECK-NEXT: lgdr %r2, %f12623; CHECK-NEXT: agr %r2, %r0624; CHECK-NEXT: stg %r2, 0(%r1)625; CHECK-NEXT: lgdr %r2, %f11626; CHECK-NEXT: agr %r2, %r0627; CHECK-NEXT: stg %r2, 0(%r1)628; CHECK-NEXT: lgdr %r2, %f10629; CHECK-NEXT: agr %r2, %r0630; CHECK-NEXT: stg %r2, 0(%r1)631; CHECK-NEXT: lg %r2, 160(%r15) # 8-byte Reload632; CHECK-NEXT: agr %r2, %r0633; CHECK-NEXT: stg %r2, 0(%r1)634; CHECK-NEXT: lg %r2, 168(%r15) # 8-byte Reload635; CHECK-NEXT: agr %r2, %r0636; CHECK-NEXT: stg %r2, 0(%r1)637; CHECK-NEXT: brasl %r14, foo@PLT638; CHECK-NEXT: ld %f8, 232(%r15) # 8-byte Reload639; CHECK-NEXT: ld %f9, 224(%r15) # 8-byte Reload640; CHECK-NEXT: ld %f10, 216(%r15) # 8-byte Reload641; CHECK-NEXT: ld %f11, 208(%r15) # 8-byte Reload642; CHECK-NEXT: ld %f12, 200(%r15) # 8-byte Reload643; CHECK-NEXT: ld %f13, 192(%r15) # 8-byte Reload644; CHECK-NEXT: ld %f14, 184(%r15) # 8-byte Reload645; CHECK-NEXT: ld %f15, 176(%r15) # 8-byte Reload646; CHECK-NEXT: lmg %r13, %r15, 344(%r15)647; CHECK-NEXT: br %r14648entry:649 br label %loop650 651loop:652 %double0 = phi double [ 1.0, %entry ], [ %mul0, %loop ]653 %double1 = phi double [ 1.0, %entry ], [ %mul1, %loop ]654 %double2 = phi double [ 1.0, %entry ], [ %mul2, %loop ]655 %double3 = phi double [ 1.0, %entry ], [ %mul3, %loop ]656 %double4 = phi double [ 1.0, %entry ], [ %mul4, %loop ]657 %double5 = phi double [ 1.0, %entry ], [ %mul5, %loop ]658 %double6 = phi double [ 1.0, %entry ], [ %mul6, %loop ]659 %double7 = phi double [ 1.0, %entry ], [ %mul7, %loop ]660 %double8 = phi double [ 1.0, %entry ], [ %mul8, %loop ]661 %double9 = phi double [ 1.0, %entry ], [ %mul9, %loop ]662 663 %factor = call double @bar()664 %mul0 = fmul double %double0, %factor665 %mul1 = fmul double %double1, %factor666 %mul2 = fmul double %double2, %factor667 %mul3 = fmul double %double3, %factor668 %mul4 = fmul double %double4, %factor669 %mul5 = fmul double %double5, %factor670 %mul6 = fmul double %double6, %factor671 %mul7 = fmul double %double7, %factor672 %mul8 = fmul double %double8, %factor673 %mul9 = fmul double %double9, %factor674 %cont = fcmp one double %factor, 1.0675 br i1 %cont, label %loop, label %exit676 677exit:678 %unused1 = call i64 @foo()679 %bias = load volatile i64, ptr@iptr680 681 %conv0 = bitcast double %mul0 to i64682 %add0 = add i64 %conv0, %bias683 store volatile i64 %add0, ptr@iptr684 %conv1 = bitcast double %mul1 to i64685 %add1 = add i64 %conv1, %bias686 store volatile i64 %add1, ptr@iptr687 %conv2 = bitcast double %mul2 to i64688 %add2 = add i64 %conv2, %bias689 store volatile i64 %add2, ptr@iptr690 %conv3 = bitcast double %mul3 to i64691 %add3 = add i64 %conv3, %bias692 store volatile i64 %add3, ptr@iptr693 %conv4 = bitcast double %mul4 to i64694 %add4 = add i64 %conv4, %bias695 store volatile i64 %add4, ptr@iptr696 %conv5 = bitcast double %mul5 to i64697 %add5 = add i64 %conv5, %bias698 store volatile i64 %add5, ptr@iptr699 %conv6 = bitcast double %mul6 to i64700 %add6 = add i64 %conv6, %bias701 store volatile i64 %add6, ptr@iptr702 %conv7 = bitcast double %mul7 to i64703 %add7 = add i64 %conv7, %bias704 store volatile i64 %add7, ptr@iptr705 %conv8 = bitcast double %mul8 to i64706 %add8 = add i64 %conv8, %bias707 store volatile i64 %add8, ptr@iptr708 %conv9 = bitcast double %mul9 to i64709 %add9 = add i64 %conv9, %bias710 store volatile i64 %add9, ptr@iptr711 712 %unused2 = call i64 @foo()713 714 ret void715}716