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1; Test 64-bit floating-point stores.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s5 6; Test the low end of the STD range.7define void @f1(ptr %src, double %val) {8; CHECK-LABEL: f1:9; CHECK: std %f0, 0(%r2)10; CHECK: br %r1411 store double %val, ptr %src12 ret void13}14 15; Test the high end of the STD range.16define void @f2(ptr %src, double %val) {17; CHECK-LABEL: f2:18; CHECK: std %f0, 4088(%r2)19; CHECK: br %r1420 %ptr = getelementptr double, ptr %src, i64 51121 store double %val, ptr %ptr22 ret void23}24 25; Check the next doubleword up, which should use STDY instead of STD.26define void @f3(ptr %src, double %val) {27; CHECK-LABEL: f3:28; CHECK: stdy %f0, 4096(%r2)29; CHECK: br %r1430 %ptr = getelementptr double, ptr %src, i64 51231 store double %val, ptr %ptr32 ret void33}34 35; Check the high end of the aligned STDY range.36define void @f4(ptr %src, double %val) {37; CHECK-LABEL: f4:38; CHECK: stdy %f0, 524280(%r2)39; CHECK: br %r1440 %ptr = getelementptr double, ptr %src, i64 6553541 store double %val, ptr %ptr42 ret void43}44 45; Check the next doubleword up, which needs separate address logic.46; Other sequences besides this one would be OK.47define void @f5(ptr %src, double %val) {48; CHECK-LABEL: f5:49; CHECK: agfi %r2, 52428850; CHECK: std %f0, 0(%r2)51; CHECK: br %r1452 %ptr = getelementptr double, ptr %src, i64 6553653 store double %val, ptr %ptr54 ret void55}56 57; Check the high end of the negative aligned STDY range.58define void @f6(ptr %src, double %val) {59; CHECK-LABEL: f6:60; CHECK: stdy %f0, -8(%r2)61; CHECK: br %r1462 %ptr = getelementptr double, ptr %src, i64 -163 store double %val, ptr %ptr64 ret void65}66 67; Check the low end of the STDY range.68define void @f7(ptr %src, double %val) {69; CHECK-LABEL: f7:70; CHECK: stdy %f0, -524288(%r2)71; CHECK: br %r1472 %ptr = getelementptr double, ptr %src, i64 -6553673 store double %val, ptr %ptr74 ret void75}76 77; Check the next doubleword down, which needs separate address logic.78; Other sequences besides this one would be OK.79define void @f8(ptr %src, double %val) {80; CHECK-LABEL: f8:81; CHECK: agfi %r2, -52429682; CHECK: std %f0, 0(%r2)83; CHECK: br %r1484 %ptr = getelementptr double, ptr %src, i64 -6553785 store double %val, ptr %ptr86 ret void87}88 89; Check that STD allows an index.90define void @f9(i64 %src, i64 %index, double %val) {91; CHECK-LABEL: f9:92; CHECK: std %f0, 4095({{%r3,%r2|%r2,%r3}})93; CHECK: br %r1494 %add1 = add i64 %src, %index95 %add2 = add i64 %add1, 409596 %ptr = inttoptr i64 %add2 to ptr97 store double %val, ptr %ptr98 ret void99}100 101; Check that STDY allows an index.102define void @f10(i64 %src, i64 %index, double %val) {103; CHECK-LABEL: f10:104; CHECK: stdy %f0, 4096({{%r3,%r2|%r2,%r3}})105; CHECK: br %r14106 %add1 = add i64 %src, %index107 %add2 = add i64 %add1, 4096108 %ptr = inttoptr i64 %add2 to ptr109 store double %val, ptr %ptr110 ret void111}112