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1; Test the handling of the frame pointer (%r11).2;3; RUN: llc < %s -mtriple=s390x-linux-gnu -frame-pointer=all | FileCheck %s4 5; We should always initialise %r11 when FP elimination is disabled.6; We don't need to allocate any more than the caller-provided 160-byte7; area though.8define i32 @f1(i32 %x) {9; CHECK-LABEL: f1:10; CHECK: stmg %r11, %r15, 88(%r15)11; CHECK: .cfi_offset %r11, -7212; CHECK: .cfi_offset %r15, -4013; CHECK-NOT: ag14; CHECK: lgr %r11, %r1515; CHECK: .cfi_def_cfa_register %r1116; CHECK: lmg %r11, %r15, 88(%r11)17; CHECK: br %r1418 %y = add i32 %x, 119 ret i32 %y20}21 22; Make sure that frame accesses after the initial allocation are relative23; to %r11 rather than %r15.24define void @f2(i64 %x) {25; CHECK-LABEL: f2:26; CHECK: stmg %r11, %r15, 88(%r15)27; CHECK: .cfi_offset %r11, -7228; CHECK: .cfi_offset %r15, -4029; CHECK: aghi %r15, -16830; CHECK: .cfi_def_cfa_offset 32831; CHECK: lgr %r11, %r1532; CHECK: .cfi_def_cfa_register %r1133; CHECK: stg %r2, 160(%r11)34; CHECK: lmg %r11, %r15, 256(%r11)35; CHECK: br %r1436 %y = alloca i64, align 837 store volatile i64 %x, ptr %y38 ret void39}40 41; This function should require all GPRs but no other spill slots.42; It shouldn't need to allocate its own frame.43define void @f3(ptr %ptr) {44; CHECK-LABEL: f3:45; CHECK: stmg %r6, %r15, 48(%r15)46; CHECK-NOT: %r1547; CHECK-NOT: %r1148; CHECK: .cfi_offset %r6, -11249; CHECK: .cfi_offset %r7, -10450; CHECK: .cfi_offset %r8, -9651; CHECK: .cfi_offset %r9, -8852; CHECK: .cfi_offset %r10, -8053; CHECK: .cfi_offset %r11, -7254; CHECK: .cfi_offset %r12, -6455; CHECK: .cfi_offset %r13, -5656; CHECK: .cfi_offset %r14, -4857; CHECK: .cfi_offset %r15, -4058; CHECK-NOT: ag59; CHECK: lgr %r11, %r1560; CHECK: .cfi_def_cfa_register %r1161; ...main function body...62; CHECK-NOT: %r1563; CHECK-NOT: %r1164; CHECK: st {{.*}}, 4(%r2)65; CHECK: lmg %r6, %r15, 48(%r11)66; CHECK: br %r1467 %l0 = load volatile i32, ptr %ptr68 %l1 = load volatile i32, ptr %ptr69 %l3 = load volatile i32, ptr %ptr70 %l4 = load volatile i32, ptr %ptr71 %l5 = load volatile i32, ptr %ptr72 %l6 = load volatile i32, ptr %ptr73 %l7 = load volatile i32, ptr %ptr74 %l8 = load volatile i32, ptr %ptr75 %l9 = load volatile i32, ptr %ptr76 %l10 = load volatile i32, ptr %ptr77 %l12 = load volatile i32, ptr %ptr78 %l13 = load volatile i32, ptr %ptr79 %l14 = load volatile i32, ptr %ptr80 %add0 = add i32 %l0, %l081 %add1 = add i32 %l1, %add082 %add3 = add i32 %l3, %add183 %add4 = add i32 %l4, %add384 %add5 = add i32 %l5, %add485 %add6 = add i32 %l6, %add586 %add7 = add i32 %l7, %add687 %add8 = add i32 %l8, %add788 %add9 = add i32 %l9, %add889 %add10 = add i32 %l10, %add990 %add12 = add i32 %l12, %add1091 %add13 = add i32 %l13, %add1292 %add14 = add i32 %l14, %add1393 store volatile i32 %add0, ptr %ptr94 store volatile i32 %add1, ptr %ptr95 store volatile i32 %add3, ptr %ptr96 store volatile i32 %add4, ptr %ptr97 store volatile i32 %add5, ptr %ptr98 store volatile i32 %add6, ptr %ptr99 store volatile i32 %add7, ptr %ptr100 store volatile i32 %add8, ptr %ptr101 store volatile i32 %add9, ptr %ptr102 store volatile i32 %add10, ptr %ptr103 store volatile i32 %add12, ptr %ptr104 store volatile i32 %add13, ptr %ptr105 %final = getelementptr i32, ptr %ptr, i32 1106 store volatile i32 %add14, ptr %final107 ret void108}109 110; The largest frame for which the LMG is in range. This frame has two111; emergency spill slots at 160(%r11), so create a frame of size 524192112; by allocating (524192 - 176) / 8 = 65502 doublewords.113define void @f4(i64 %x) {114; CHECK-LABEL: f4:115; CHECK: stmg %r11, %r15, 88(%r15)116; CHECK: .cfi_offset %r11, -72117; CHECK: .cfi_offset %r15, -40118; CHECK: agfi %r15, -524192119; CHECK: .cfi_def_cfa_offset 524352120; CHECK: lgr %r11, %r15121; CHECK: .cfi_def_cfa_register %r11122; CHECK: stg %r2, 176(%r11)123; CHECK-NOT: ag124; CHECK: lmg %r11, %r15, 524280(%r11)125; CHECK: br %r14126 %y = alloca [65502 x i64], align 8127 store volatile i64 %x, ptr %y128 ret void129}130 131; The next frame size larger than f4.132define void @f5(i64 %x) {133; CHECK-LABEL: f5:134; CHECK: stmg %r11, %r15, 88(%r15)135; CHECK: .cfi_offset %r11, -72136; CHECK: .cfi_offset %r15, -40137; CHECK: agfi %r15, -524200138; CHECK: .cfi_def_cfa_offset 524360139; CHECK: lgr %r11, %r15140; CHECK: .cfi_def_cfa_register %r11141; CHECK: stg %r2, 176(%r11)142; CHECK: aghi %r11, 8143; CHECK: lmg %r11, %r15, 524280(%r11)144; CHECK: br %r14145 %y = alloca [65503 x i64], align 8146 store volatile i64 %x, ptr %y147 ret void148}149 150; The tests above establish that %r11 is handled like %r15 for LMG.151; Rely on the %r15-based tests in frame-08.ll for other cases.152