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1; Test spilling of FPRs.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s4 5; We need to save and restore 8 of the 16 FPRs and allocate an additional6; 4-byte spill slot, rounded to 8 bytes. The frame size should be exactly7; 160 + 8 * 8 = 232.8define void @f1(ptr %ptr) {9; CHECK-LABEL: f1:10; CHECK: aghi %r15, -23211; CHECK: std %f8, 224(%r15)12; CHECK: std %f9, 216(%r15)13; CHECK: std %f10, 208(%r15)14; CHECK: std %f11, 200(%r15)15; CHECK: std %f12, 192(%r15)16; CHECK: std %f13, 184(%r15)17; CHECK: std %f14, 176(%r15)18; CHECK: std %f15, 168(%r15)19; CHECK-NOT: 160(%r15)20; CHECK: ste [[REGISTER:%f[0-9]+]], 164(%r15)21; CHECK-NOT: 160(%r15)22; CHECK: le [[REGISTER]], 164(%r15)23; CHECK-NOT: 160(%r15)24; CHECK: ld %f8, 224(%r15)25; CHECK: ld %f9, 216(%r15)26; CHECK: ld %f10, 208(%r15)27; CHECK: ld %f11, 200(%r15)28; CHECK: ld %f12, 192(%r15)29; CHECK: ld %f13, 184(%r15)30; CHECK: ld %f14, 176(%r15)31; CHECK: ld %f15, 168(%r15)32; CHECK: aghi %r15, 23233; CHECK: br %r1434 %l0 = load volatile float, ptr %ptr35 %l1 = load volatile float, ptr %ptr36 %l2 = load volatile float, ptr %ptr37 %l3 = load volatile float, ptr %ptr38 %l4 = load volatile float, ptr %ptr39 %l5 = load volatile float, ptr %ptr40 %l6 = load volatile float, ptr %ptr41 %l7 = load volatile float, ptr %ptr42 %l8 = load volatile float, ptr %ptr43 %l9 = load volatile float, ptr %ptr44 %l10 = load volatile float, ptr %ptr45 %l11 = load volatile float, ptr %ptr46 %l12 = load volatile float, ptr %ptr47 %l13 = load volatile float, ptr %ptr48 %l14 = load volatile float, ptr %ptr49 %l15 = load volatile float, ptr %ptr50 %lx = load volatile float, ptr %ptr51 store volatile float %lx, ptr %ptr52 store volatile float %l15, ptr %ptr53 store volatile float %l14, ptr %ptr54 store volatile float %l13, ptr %ptr55 store volatile float %l12, ptr %ptr56 store volatile float %l11, ptr %ptr57 store volatile float %l10, ptr %ptr58 store volatile float %l9, ptr %ptr59 store volatile float %l8, ptr %ptr60 store volatile float %l7, ptr %ptr61 store volatile float %l6, ptr %ptr62 store volatile float %l5, ptr %ptr63 store volatile float %l4, ptr %ptr64 store volatile float %l3, ptr %ptr65 store volatile float %l2, ptr %ptr66 store volatile float %l1, ptr %ptr67 store volatile float %l0, ptr %ptr68 ret void69}70 71; Same for doubles, except that the full spill slot is used.72define void @f2(ptr %ptr) {73; CHECK-LABEL: f2:74; CHECK: aghi %r15, -23275; CHECK: std %f8, 224(%r15)76; CHECK: std %f9, 216(%r15)77; CHECK: std %f10, 208(%r15)78; CHECK: std %f11, 200(%r15)79; CHECK: std %f12, 192(%r15)80; CHECK: std %f13, 184(%r15)81; CHECK: std %f14, 176(%r15)82; CHECK: std %f15, 168(%r15)83; CHECK: std [[REGISTER:%f[0-9]+]], 160(%r15)84; CHECK: ld [[REGISTER]], 160(%r15)85; CHECK: ld %f8, 224(%r15)86; CHECK: ld %f9, 216(%r15)87; CHECK: ld %f10, 208(%r15)88; CHECK: ld %f11, 200(%r15)89; CHECK: ld %f12, 192(%r15)90; CHECK: ld %f13, 184(%r15)91; CHECK: ld %f14, 176(%r15)92; CHECK: ld %f15, 168(%r15)93; CHECK: aghi %r15, 23294; CHECK: br %r1495 %l0 = load volatile double, ptr %ptr96 %l1 = load volatile double, ptr %ptr97 %l2 = load volatile double, ptr %ptr98 %l3 = load volatile double, ptr %ptr99 %l4 = load volatile double, ptr %ptr100 %l5 = load volatile double, ptr %ptr101 %l6 = load volatile double, ptr %ptr102 %l7 = load volatile double, ptr %ptr103 %l8 = load volatile double, ptr %ptr104 %l9 = load volatile double, ptr %ptr105 %l10 = load volatile double, ptr %ptr106 %l11 = load volatile double, ptr %ptr107 %l12 = load volatile double, ptr %ptr108 %l13 = load volatile double, ptr %ptr109 %l14 = load volatile double, ptr %ptr110 %l15 = load volatile double, ptr %ptr111 %lx = load volatile double, ptr %ptr112 store volatile double %lx, ptr %ptr113 store volatile double %l15, ptr %ptr114 store volatile double %l14, ptr %ptr115 store volatile double %l13, ptr %ptr116 store volatile double %l12, ptr %ptr117 store volatile double %l11, ptr %ptr118 store volatile double %l10, ptr %ptr119 store volatile double %l9, ptr %ptr120 store volatile double %l8, ptr %ptr121 store volatile double %l7, ptr %ptr122 store volatile double %l6, ptr %ptr123 store volatile double %l5, ptr %ptr124 store volatile double %l4, ptr %ptr125 store volatile double %l3, ptr %ptr126 store volatile double %l2, ptr %ptr127 store volatile double %l1, ptr %ptr128 store volatile double %l0, ptr %ptr129 ret void130}131 132; The long double case needs a 16-byte spill slot.133define void @f3(ptr %ptr) {134; CHECK-LABEL: f3:135; CHECK: aghi %r15, -240136; CHECK: std %f8, 232(%r15)137; CHECK: std %f9, 224(%r15)138; CHECK: std %f10, 216(%r15)139; CHECK: std %f11, 208(%r15)140; CHECK: std %f12, 200(%r15)141; CHECK: std %f13, 192(%r15)142; CHECK: std %f14, 184(%r15)143; CHECK: std %f15, 176(%r15)144; CHECK: std [[REGISTER1:%f[0-9]+]], 160(%r15)145; CHECK: std [[REGISTER2:%f[0-9]+]], 168(%r15)146; CHECK: ld [[REGISTER1]], 160(%r15)147; CHECK: ld [[REGISTER2]], 168(%r15)148; CHECK: ld %f8, 232(%r15)149; CHECK: ld %f9, 224(%r15)150; CHECK: ld %f10, 216(%r15)151; CHECK: ld %f11, 208(%r15)152; CHECK: ld %f12, 200(%r15)153; CHECK: ld %f13, 192(%r15)154; CHECK: ld %f14, 184(%r15)155; CHECK: ld %f15, 176(%r15)156; CHECK: aghi %r15, 240157; CHECK: br %r14158 %l0 = load volatile fp128, ptr %ptr159 %l1 = load volatile fp128, ptr %ptr160 %l4 = load volatile fp128, ptr %ptr161 %l5 = load volatile fp128, ptr %ptr162 %l8 = load volatile fp128, ptr %ptr163 %l9 = load volatile fp128, ptr %ptr164 %l12 = load volatile fp128, ptr %ptr165 %l13 = load volatile fp128, ptr %ptr166 %lx = load volatile fp128, ptr %ptr167 store volatile fp128 %lx, ptr %ptr168 store volatile fp128 %l13, ptr %ptr169 store volatile fp128 %l12, ptr %ptr170 store volatile fp128 %l9, ptr %ptr171 store volatile fp128 %l8, ptr %ptr172 store volatile fp128 %l5, ptr %ptr173 store volatile fp128 %l4, ptr %ptr174 store volatile fp128 %l1, ptr %ptr175 store volatile fp128 %l0, ptr %ptr176 ret void177}178