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1; Test spilling of vector registers.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s4 5; We need to allocate a 16-byte spill slot and save the 8 call-saved FPRs.6; The frame size should be exactly 160 + 16 + 8 * 8 = 240.7define void @f1(ptr %ptr) {8; CHECK-LABEL: f1:9; CHECK: aghi %r15, -24010; CHECK-DAG: std %f8,11; CHECK-DAG: std %f9,12; CHECK-DAG: std %f10,13; CHECK-DAG: std %f11,14; CHECK-DAG: std %f12,15; CHECK-DAG: std %f13,16; CHECK-DAG: std %f14,17; CHECK-DAG: std %f15,18; CHECK: vst {{%v[0-9]+}}, 160(%r15), 319; CHECK: vl {{%v[0-9]+}}, 160(%r15), 320; CHECK-DAG: ld %f8,21; CHECK-DAG: ld %f9,22; CHECK-DAG: ld %f10,23; CHECK-DAG: ld %f11,24; CHECK-DAG: ld %f12,25; CHECK-DAG: ld %f13,26; CHECK-DAG: ld %f14,27; CHECK-DAG: ld %f15,28; CHECK: aghi %r15, 24029; CHECK: br %r1430 %v0 = load volatile <16 x i8>, ptr %ptr31 %v1 = load volatile <16 x i8>, ptr %ptr32 %v2 = load volatile <16 x i8>, ptr %ptr33 %v3 = load volatile <16 x i8>, ptr %ptr34 %v4 = load volatile <16 x i8>, ptr %ptr35 %v5 = load volatile <16 x i8>, ptr %ptr36 %v6 = load volatile <16 x i8>, ptr %ptr37 %v7 = load volatile <16 x i8>, ptr %ptr38 %v8 = load volatile <16 x i8>, ptr %ptr39 %v9 = load volatile <16 x i8>, ptr %ptr40 %v10 = load volatile <16 x i8>, ptr %ptr41 %v11 = load volatile <16 x i8>, ptr %ptr42 %v12 = load volatile <16 x i8>, ptr %ptr43 %v13 = load volatile <16 x i8>, ptr %ptr44 %v14 = load volatile <16 x i8>, ptr %ptr45 %v15 = load volatile <16 x i8>, ptr %ptr46 %v16 = load volatile <16 x i8>, ptr %ptr47 %v17 = load volatile <16 x i8>, ptr %ptr48 %v18 = load volatile <16 x i8>, ptr %ptr49 %v19 = load volatile <16 x i8>, ptr %ptr50 %v20 = load volatile <16 x i8>, ptr %ptr51 %v21 = load volatile <16 x i8>, ptr %ptr52 %v22 = load volatile <16 x i8>, ptr %ptr53 %v23 = load volatile <16 x i8>, ptr %ptr54 %v24 = load volatile <16 x i8>, ptr %ptr55 %v25 = load volatile <16 x i8>, ptr %ptr56 %v26 = load volatile <16 x i8>, ptr %ptr57 %v27 = load volatile <16 x i8>, ptr %ptr58 %v28 = load volatile <16 x i8>, ptr %ptr59 %v29 = load volatile <16 x i8>, ptr %ptr60 %v30 = load volatile <16 x i8>, ptr %ptr61 %v31 = load volatile <16 x i8>, ptr %ptr62 %vx = load volatile <16 x i8>, ptr %ptr63 store volatile <16 x i8> %vx, ptr %ptr64 store volatile <16 x i8> %v31, ptr %ptr65 store volatile <16 x i8> %v30, ptr %ptr66 store volatile <16 x i8> %v29, ptr %ptr67 store volatile <16 x i8> %v28, ptr %ptr68 store volatile <16 x i8> %v27, ptr %ptr69 store volatile <16 x i8> %v26, ptr %ptr70 store volatile <16 x i8> %v25, ptr %ptr71 store volatile <16 x i8> %v24, ptr %ptr72 store volatile <16 x i8> %v23, ptr %ptr73 store volatile <16 x i8> %v22, ptr %ptr74 store volatile <16 x i8> %v21, ptr %ptr75 store volatile <16 x i8> %v20, ptr %ptr76 store volatile <16 x i8> %v19, ptr %ptr77 store volatile <16 x i8> %v18, ptr %ptr78 store volatile <16 x i8> %v17, ptr %ptr79 store volatile <16 x i8> %v16, ptr %ptr80 store volatile <16 x i8> %v15, ptr %ptr81 store volatile <16 x i8> %v14, ptr %ptr82 store volatile <16 x i8> %v13, ptr %ptr83 store volatile <16 x i8> %v12, ptr %ptr84 store volatile <16 x i8> %v11, ptr %ptr85 store volatile <16 x i8> %v10, ptr %ptr86 store volatile <16 x i8> %v9, ptr %ptr87 store volatile <16 x i8> %v8, ptr %ptr88 store volatile <16 x i8> %v7, ptr %ptr89 store volatile <16 x i8> %v6, ptr %ptr90 store volatile <16 x i8> %v5, ptr %ptr91 store volatile <16 x i8> %v4, ptr %ptr92 store volatile <16 x i8> %v3, ptr %ptr93 store volatile <16 x i8> %v2, ptr %ptr94 store volatile <16 x i8> %v1, ptr %ptr95 store volatile <16 x i8> %v0, ptr %ptr96 ret void97}98 99; Like f1, but no 16-byte slot should be needed, and no outgoing reg save100; area of 160 bytes.101define void @f2(ptr %ptr) {102; CHECK-LABEL: f2:103; CHECK: aghi %r15, -64104; CHECK-DAG: std %f8,105; CHECK-DAG: std %f9,106; CHECK-DAG: std %f10,107; CHECK-DAG: std %f11,108; CHECK-DAG: std %f12,109; CHECK-DAG: std %f13,110; CHECK-DAG: std %f14,111; CHECK-DAG: std %f15,112; CHECK-NOT: vst {{.*}}(%r15)113; CHECK-NOT: vl {{.*}}(%r15)114; CHECK-DAG: ld %f8,115; CHECK-DAG: ld %f9,116; CHECK-DAG: ld %f10,117; CHECK-DAG: ld %f11,118; CHECK-DAG: ld %f12,119; CHECK-DAG: ld %f13,120; CHECK-DAG: ld %f14,121; CHECK-DAG: ld %f15,122; CHECK: aghi %r15, 64123; CHECK: br %r14124 %v0 = load volatile <16 x i8>, ptr %ptr125 %v1 = load volatile <16 x i8>, ptr %ptr126 %v2 = load volatile <16 x i8>, ptr %ptr127 %v3 = load volatile <16 x i8>, ptr %ptr128 %v4 = load volatile <16 x i8>, ptr %ptr129 %v5 = load volatile <16 x i8>, ptr %ptr130 %v6 = load volatile <16 x i8>, ptr %ptr131 %v7 = load volatile <16 x i8>, ptr %ptr132 %v8 = load volatile <16 x i8>, ptr %ptr133 %v9 = load volatile <16 x i8>, ptr %ptr134 %v10 = load volatile <16 x i8>, ptr %ptr135 %v11 = load volatile <16 x i8>, ptr %ptr136 %v12 = load volatile <16 x i8>, ptr %ptr137 %v13 = load volatile <16 x i8>, ptr %ptr138 %v14 = load volatile <16 x i8>, ptr %ptr139 %v15 = load volatile <16 x i8>, ptr %ptr140 %v16 = load volatile <16 x i8>, ptr %ptr141 %v17 = load volatile <16 x i8>, ptr %ptr142 %v18 = load volatile <16 x i8>, ptr %ptr143 %v19 = load volatile <16 x i8>, ptr %ptr144 %v20 = load volatile <16 x i8>, ptr %ptr145 %v21 = load volatile <16 x i8>, ptr %ptr146 %v22 = load volatile <16 x i8>, ptr %ptr147 %v23 = load volatile <16 x i8>, ptr %ptr148 %v24 = load volatile <16 x i8>, ptr %ptr149 %v25 = load volatile <16 x i8>, ptr %ptr150 %v26 = load volatile <16 x i8>, ptr %ptr151 %v27 = load volatile <16 x i8>, ptr %ptr152 %v28 = load volatile <16 x i8>, ptr %ptr153 %v29 = load volatile <16 x i8>, ptr %ptr154 %v30 = load volatile <16 x i8>, ptr %ptr155 %v31 = load volatile <16 x i8>, ptr %ptr156 store volatile <16 x i8> %v31, ptr %ptr157 store volatile <16 x i8> %v30, ptr %ptr158 store volatile <16 x i8> %v29, ptr %ptr159 store volatile <16 x i8> %v28, ptr %ptr160 store volatile <16 x i8> %v27, ptr %ptr161 store volatile <16 x i8> %v26, ptr %ptr162 store volatile <16 x i8> %v25, ptr %ptr163 store volatile <16 x i8> %v24, ptr %ptr164 store volatile <16 x i8> %v23, ptr %ptr165 store volatile <16 x i8> %v22, ptr %ptr166 store volatile <16 x i8> %v21, ptr %ptr167 store volatile <16 x i8> %v20, ptr %ptr168 store volatile <16 x i8> %v19, ptr %ptr169 store volatile <16 x i8> %v18, ptr %ptr170 store volatile <16 x i8> %v17, ptr %ptr171 store volatile <16 x i8> %v16, ptr %ptr172 store volatile <16 x i8> %v15, ptr %ptr173 store volatile <16 x i8> %v14, ptr %ptr174 store volatile <16 x i8> %v13, ptr %ptr175 store volatile <16 x i8> %v12, ptr %ptr176 store volatile <16 x i8> %v11, ptr %ptr177 store volatile <16 x i8> %v10, ptr %ptr178 store volatile <16 x i8> %v9, ptr %ptr179 store volatile <16 x i8> %v8, ptr %ptr180 store volatile <16 x i8> %v7, ptr %ptr181 store volatile <16 x i8> %v6, ptr %ptr182 store volatile <16 x i8> %v5, ptr %ptr183 store volatile <16 x i8> %v4, ptr %ptr184 store volatile <16 x i8> %v3, ptr %ptr185 store volatile <16 x i8> %v2, ptr %ptr186 store volatile <16 x i8> %v1, ptr %ptr187 store volatile <16 x i8> %v0, ptr %ptr188 ret void189}190 191; Like f2, but only %f8 should be saved.192define void @f3(ptr %ptr) {193; CHECK-LABEL: f3:194; CHECK: aghi %r15, -8195; CHECK-DAG: std %f8,196; CHECK-NOT: vst {{.*}}(%r15)197; CHECK-NOT: vl {{.*}}(%r15)198; CHECK-NOT: %v9199; CHECK-NOT: %v10200; CHECK-NOT: %v11201; CHECK-NOT: %v12202; CHECK-NOT: %v13203; CHECK-NOT: %v14204; CHECK-NOT: %v15205; CHECK-DAG: ld %f8,206; CHECK: aghi %r15, 8207; CHECK: br %r14208 %v0 = load volatile <16 x i8>, ptr %ptr209 %v1 = load volatile <16 x i8>, ptr %ptr210 %v2 = load volatile <16 x i8>, ptr %ptr211 %v3 = load volatile <16 x i8>, ptr %ptr212 %v4 = load volatile <16 x i8>, ptr %ptr213 %v5 = load volatile <16 x i8>, ptr %ptr214 %v6 = load volatile <16 x i8>, ptr %ptr215 %v7 = load volatile <16 x i8>, ptr %ptr216 %v8 = load volatile <16 x i8>, ptr %ptr217 %v16 = load volatile <16 x i8>, ptr %ptr218 %v17 = load volatile <16 x i8>, ptr %ptr219 %v18 = load volatile <16 x i8>, ptr %ptr220 %v19 = load volatile <16 x i8>, ptr %ptr221 %v20 = load volatile <16 x i8>, ptr %ptr222 %v21 = load volatile <16 x i8>, ptr %ptr223 %v22 = load volatile <16 x i8>, ptr %ptr224 %v23 = load volatile <16 x i8>, ptr %ptr225 %v24 = load volatile <16 x i8>, ptr %ptr226 %v25 = load volatile <16 x i8>, ptr %ptr227 %v26 = load volatile <16 x i8>, ptr %ptr228 %v27 = load volatile <16 x i8>, ptr %ptr229 %v28 = load volatile <16 x i8>, ptr %ptr230 %v29 = load volatile <16 x i8>, ptr %ptr231 %v30 = load volatile <16 x i8>, ptr %ptr232 %v31 = load volatile <16 x i8>, ptr %ptr233 store volatile <16 x i8> %v31, ptr %ptr234 store volatile <16 x i8> %v30, ptr %ptr235 store volatile <16 x i8> %v29, ptr %ptr236 store volatile <16 x i8> %v28, ptr %ptr237 store volatile <16 x i8> %v27, ptr %ptr238 store volatile <16 x i8> %v26, ptr %ptr239 store volatile <16 x i8> %v25, ptr %ptr240 store volatile <16 x i8> %v24, ptr %ptr241 store volatile <16 x i8> %v23, ptr %ptr242 store volatile <16 x i8> %v22, ptr %ptr243 store volatile <16 x i8> %v21, ptr %ptr244 store volatile <16 x i8> %v20, ptr %ptr245 store volatile <16 x i8> %v19, ptr %ptr246 store volatile <16 x i8> %v18, ptr %ptr247 store volatile <16 x i8> %v17, ptr %ptr248 store volatile <16 x i8> %v16, ptr %ptr249 store volatile <16 x i8> %v8, ptr %ptr250 store volatile <16 x i8> %v7, ptr %ptr251 store volatile <16 x i8> %v6, ptr %ptr252 store volatile <16 x i8> %v5, ptr %ptr253 store volatile <16 x i8> %v4, ptr %ptr254 store volatile <16 x i8> %v3, ptr %ptr255 store volatile <16 x i8> %v2, ptr %ptr256 store volatile <16 x i8> %v1, ptr %ptr257 store volatile <16 x i8> %v0, ptr %ptr258 ret void259}260 261; Like f2, but no registers should be saved.262define void @f4(ptr %ptr) {263; CHECK-LABEL: f4:264; CHECK-NOT: %r15265; CHECK: br %r14266 %v0 = load volatile <16 x i8>, ptr %ptr267 %v1 = load volatile <16 x i8>, ptr %ptr268 %v2 = load volatile <16 x i8>, ptr %ptr269 %v3 = load volatile <16 x i8>, ptr %ptr270 %v4 = load volatile <16 x i8>, ptr %ptr271 %v5 = load volatile <16 x i8>, ptr %ptr272 %v6 = load volatile <16 x i8>, ptr %ptr273 %v7 = load volatile <16 x i8>, ptr %ptr274 %v16 = load volatile <16 x i8>, ptr %ptr275 %v17 = load volatile <16 x i8>, ptr %ptr276 %v18 = load volatile <16 x i8>, ptr %ptr277 %v19 = load volatile <16 x i8>, ptr %ptr278 %v20 = load volatile <16 x i8>, ptr %ptr279 %v21 = load volatile <16 x i8>, ptr %ptr280 %v22 = load volatile <16 x i8>, ptr %ptr281 %v23 = load volatile <16 x i8>, ptr %ptr282 %v24 = load volatile <16 x i8>, ptr %ptr283 %v25 = load volatile <16 x i8>, ptr %ptr284 %v26 = load volatile <16 x i8>, ptr %ptr285 %v27 = load volatile <16 x i8>, ptr %ptr286 %v28 = load volatile <16 x i8>, ptr %ptr287 %v29 = load volatile <16 x i8>, ptr %ptr288 %v30 = load volatile <16 x i8>, ptr %ptr289 %v31 = load volatile <16 x i8>, ptr %ptr290 store volatile <16 x i8> %v31, ptr %ptr291 store volatile <16 x i8> %v30, ptr %ptr292 store volatile <16 x i8> %v29, ptr %ptr293 store volatile <16 x i8> %v28, ptr %ptr294 store volatile <16 x i8> %v27, ptr %ptr295 store volatile <16 x i8> %v26, ptr %ptr296 store volatile <16 x i8> %v25, ptr %ptr297 store volatile <16 x i8> %v24, ptr %ptr298 store volatile <16 x i8> %v23, ptr %ptr299 store volatile <16 x i8> %v22, ptr %ptr300 store volatile <16 x i8> %v21, ptr %ptr301 store volatile <16 x i8> %v20, ptr %ptr302 store volatile <16 x i8> %v19, ptr %ptr303 store volatile <16 x i8> %v18, ptr %ptr304 store volatile <16 x i8> %v17, ptr %ptr305 store volatile <16 x i8> %v16, ptr %ptr306 store volatile <16 x i8> %v7, ptr %ptr307 store volatile <16 x i8> %v6, ptr %ptr308 store volatile <16 x i8> %v5, ptr %ptr309 store volatile <16 x i8> %v4, ptr %ptr310 store volatile <16 x i8> %v3, ptr %ptr311 store volatile <16 x i8> %v2, ptr %ptr312 store volatile <16 x i8> %v1, ptr %ptr313 store volatile <16 x i8> %v0, ptr %ptr314 ret void315}316