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1; Test insertions of 32-bit constants into one half of an i64.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s4 5; Prefer LHI over IILF for signed 16-bit constants.6define i64 @f1(i64 %a) {7; CHECK-LABEL: f1:8; CHECK-NOT: ni9; CHECK: lhi %r2, 110; CHECK: br %r1411 %and = and i64 %a, 1844674406941458432012 %or = or i64 %and, 113 ret i64 %or14}15 16; Check the high end of the LHI range.17define i64 @f2(i64 %a) {18; CHECK-LABEL: f2:19; CHECK-NOT: ni20; CHECK: lhi %r2, 3276721; CHECK: br %r1422 %and = and i64 %a, 1844674406941458432023 %or = or i64 %and, 3276724 ret i64 %or25}26 27; Check the next value up, which should use IILF instead.28define i64 @f3(i64 %a) {29; CHECK-LABEL: f3:30; CHECK-NOT: ni31; CHECK: iilf %r2, 3276832; CHECK: br %r1433 %and = and i64 %a, 1844674406941458432034 %or = or i64 %and, 3276835 ret i64 %or36}37 38; Check a value in which the lower 16 bits are clear.39define i64 @f4(i64 %a) {40; CHECK-LABEL: f4:41; CHECK-NOT: ni42; CHECK: iilf %r2, 6553643; CHECK: br %r1444 %and = and i64 %a, 1844674406941458432045 %or = or i64 %and, 6553646 ret i64 %or47}48 49; Check the highest useful IILF value (-0x8001).50define i64 @f5(i64 %a) {51; CHECK-LABEL: f5:52; CHECK-NOT: ni53; CHECK: iilf %r2, 429493452754; CHECK: br %r1455 %and = and i64 %a, 1844674406941458432056 %or = or i64 %and, 429493452757 ret i64 %or58}59 60; Check the next value up, which should use LHI instead.61define i64 @f6(i64 %a) {62; CHECK-LABEL: f6:63; CHECK-NOT: ni64; CHECK: lhi %r2, -3276865; CHECK: br %r1466 %and = and i64 %a, 1844674406941458432067 %or = or i64 %and, 429493452868 ret i64 %or69}70 71; Check the highest useful LHI value. (We use OILF for -1 instead, although72; LHI might be better there too.)73define i64 @f7(i64 %a) {74; CHECK-LABEL: f7:75; CHECK-NOT: ni76; CHECK: lhi %r2, -277; CHECK: br %r1478 %and = and i64 %a, 1844674406941458432079 %or = or i64 %and, 429496729480 ret i64 %or81}82 83; Check that SRLG is still used if some of the high bits are known to be 084; (and so might be removed from the mask).85define i64 @f8(i64 %a) {86; CHECK-LABEL: f8:87; CHECK: srlg %r2, %r2, 188; CHECK-NEXT: iilf %r2, 3276889; CHECK: br %r1490 %shifted = lshr i64 %a, 191 %and = and i64 %shifted, 1844674406941458432092 %or = or i64 %and, 3276893 ret i64 %or94}95 96; Repeat f8 with addition, which is known to be equivalent to OR in this case.97define i64 @f9(i64 %a) {98; CHECK-LABEL: f9:99; CHECK: srlg %r2, %r2, 1100; CHECK-NEXT: iilf %r2, 32768101; CHECK: br %r14102 %shifted = lshr i64 %a, 1103 %and = and i64 %shifted, 18446744069414584320104 %or = add i64 %and, 32768105 ret i64 %or106}107 108; Repeat f8 with already-zero bits removed from the mask.109define i64 @f10(i64 %a) {110; CHECK-LABEL: f10:111; CHECK: srlg %r2, %r2, 1112; CHECK-NEXT: iilf %r2, 32768113; CHECK: br %r14114 %shifted = lshr i64 %a, 1115 %and = and i64 %shifted, 9223372032559808512116 %or = or i64 %and, 32768117 ret i64 %or118}119 120; Repeat f10 with addition, which is known to be equivalent to OR in this case.121define i64 @f11(i64 %a) {122; CHECK-LABEL: f11:123; CHECK: srlg %r2, %r2, 1124; CHECK-NEXT: iilf %r2, 32768125; CHECK: br %r14126 %shifted = lshr i64 %a, 1127 %and = and i64 %shifted, 9223372032559808512128 %or = add i64 %and, 32768129 ret i64 %or130}131 132; Check the lowest useful IIHF value.133define i64 @f12(i64 %a) {134; CHECK-LABEL: f12:135; CHECK-NOT: ni136; CHECK: iihf %r2, 1137; CHECK: br %r14138 %and = and i64 %a, 4294967295139 %or = or i64 %and, 4294967296140 ret i64 %or141}142 143; Check a value in which the lower 16 bits are clear.144define i64 @f13(i64 %a) {145; CHECK-LABEL: f13:146; CHECK-NOT: ni147; CHECK: iihf %r2, 2147483648148; CHECK: br %r14149 %and = and i64 %a, 4294967295150 %or = or i64 %and, 9223372036854775808151 ret i64 %or152}153 154; Check the highest useful IIHF value (0xfffffffe).155define i64 @f14(i64 %a) {156; CHECK-LABEL: f14:157; CHECK-NOT: ni158; CHECK: iihf %r2, 4294967294159; CHECK: br %r14160 %and = and i64 %a, 4294967295161 %or = or i64 %and, 18446744065119617024162 ret i64 %or163}164 165; Check a case in which some of the low 32 bits are known to be clear,166; and so could be removed from the AND mask.167define i64 @f15(i64 %a) {168; CHECK-LABEL: f15:169; CHECK: sllg %r2, %r2, 1170; CHECK-NEXT: iihf %r2, 1171; CHECK: br %r14172 %shifted = shl i64 %a, 1173 %and = and i64 %shifted, 4294967295174 %or = or i64 %and, 4294967296175 ret i64 %or176}177 178; Repeat f15 with the zero bits explicitly removed from the mask.179define i64 @f16(i64 %a) {180; CHECK-LABEL: f16:181; CHECK: sllg %r2, %r2, 1182; CHECK-NEXT: iihf %r2, 1183; CHECK: br %r14184 %shifted = shl i64 %a, 1185 %and = and i64 %shifted, 4294967294186 %or = or i64 %and, 4294967296187 ret i64 %or188}189 190; Check concatenation of two i32s.191define i64 @f17(i32 %a) {192; CHECK-LABEL: f17:193; CHECK: msr %r2, %r2194; CHECK-NEXT: iihf %r2, 1195; CHECK: br %r14196 %mul = mul i32 %a, %a197 %ext = zext i32 %mul to i64198 %or = or i64 %ext, 4294967296199 ret i64 %or200}201 202; Repeat f17 with the operands reversed.203define i64 @f18(i32 %a) {204; CHECK-LABEL: f18:205; CHECK: msr %r2, %r2206; CHECK-NEXT: iihf %r2, 1207; CHECK: br %r14208 %mul = mul i32 %a, %a209 %ext = zext i32 %mul to i64210 %or = or i64 4294967296, %ext211 ret i64 %or212}213 214; The truncation here isn't free; we need an explicit zero extension.215define i64 @f19(i32 %a) {216; CHECK-LABEL: f19:217; CHECK: llgcr %r2, %r2218; CHECK: oihl %r2, 1219; CHECK: br %r14220 %trunc = trunc i32 %a to i8221 %ext = zext i8 %trunc to i64222 %or = or i64 %ext, 4294967296223 ret i64 %or224}225