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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; Test 128-bit absolute value in vector registers on z173;4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z17 | FileCheck %s5 6define i128 @f1(i128 %src) {7; CHECK-LABEL: f1:8; CHECK: # %bb.0:9; CHECK-NEXT: vl %v0, 0(%r3), 310; CHECK-NEXT: vlpq %v0, %v011; CHECK-NEXT: vst %v0, 0(%r2), 312; CHECK-NEXT: br %r1413 %cmp = icmp slt i128 %src, 014 %neg = sub i128 0, %src15 %res = select i1 %cmp, i128 %neg, i128 %src16 ret i128 %res17}18