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1; Test 64-bit addition in which the second operand is constant.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s4 5; Check additions of 1.6define i64 @f1(i64 %a) {7; CHECK-LABEL: f1:8; CHECK: {{aghi %r2, 1|la %r[0-5], 1\(%r2\)}}9; CHECK: br %r1410 %add = add i64 %a, 111 ret i64 %add12}13 14; Check the high end of the AGHI range.15define i64 @f2(i64 %a) {16; CHECK-LABEL: f2:17; CHECK: aghi %r2, 3276718; CHECK: br %r1419 %add = add i64 %a, 3276720 ret i64 %add21}22 23; Check the next value up, which must use AGFI instead.24define i64 @f3(i64 %a) {25; CHECK-LABEL: f3:26; CHECK: {{agfi %r2, 32768|lay %r[0-5], 32768\(%r2\)}}27; CHECK: br %r1428 %add = add i64 %a, 3276829 ret i64 %add30}31 32; Check the high end of the AGFI range.33define i64 @f4(i64 %a) {34; CHECK-LABEL: f4:35; CHECK: agfi %r2, 214748364736; CHECK: br %r1437 %add = add i64 %a, 214748364738 ret i64 %add39}40 41; Check the next value up, which must use ALGFI instead.42define i64 @f5(i64 %a) {43; CHECK-LABEL: f5:44; CHECK: algfi %r2, 214748364845; CHECK: br %r1446 %add = add i64 %a, 214748364847 ret i64 %add48}49 50; Check the high end of the ALGFI range.51define i64 @f6(i64 %a) {52; CHECK-LABEL: f6:53; CHECK: algfi %r2, 429496729554; CHECK: br %r1455 %add = add i64 %a, 429496729556 ret i64 %add57}58 59; Check the next value up, which must be loaded into a register first.60define i64 @f7(i64 %a) {61; CHECK-LABEL: f7:62; CHECK: llihl %r0, 163; CHECK: agr64; CHECK: br %r1465 %add = add i64 %a, 429496729666 ret i64 %add67}68 69; Check the high end of the negative AGHI range.70define i64 @f8(i64 %a) {71; CHECK-LABEL: f8:72; CHECK: aghi %r2, -173; CHECK: br %r1474 %add = add i64 %a, -175 ret i64 %add76}77 78; Check the low end of the AGHI range.79define i64 @f9(i64 %a) {80; CHECK-LABEL: f9:81; CHECK: aghi %r2, -3276882; CHECK: br %r1483 %add = add i64 %a, -3276884 ret i64 %add85}86 87; Check the next value down, which must use AGFI instead.88define i64 @f10(i64 %a) {89; CHECK-LABEL: f10:90; CHECK: {{agfi %r2, -32769|lay %r[0-5]+, -32769\(%r2\)}}91; CHECK: br %r1492 %add = add i64 %a, -3276993 ret i64 %add94}95 96; Check the low end of the AGFI range.97define i64 @f11(i64 %a) {98; CHECK-LABEL: f11:99; CHECK: agfi %r2, -2147483648100; CHECK: br %r14101 %add = add i64 %a, -2147483648102 ret i64 %add103}104 105; Check the next value down, which must use SLGFI instead.106define i64 @f12(i64 %a) {107; CHECK-LABEL: f12:108; CHECK: slgfi %r2, 2147483649109; CHECK: br %r14110 %add = add i64 %a, -2147483649111 ret i64 %add112}113 114; Check the low end of the SLGFI range.115define i64 @f13(i64 %a) {116; CHECK-LABEL: f13:117; CHECK: slgfi %r2, 4294967295118; CHECK: br %r14119 %add = add i64 %a, -4294967295120 ret i64 %add121}122 123; Check the next value down, which must use register addition instead.124define i64 @f14(i64 %a) {125; CHECK-LABEL: f14:126; CHECK: llihf %r0, 4294967295127; CHECK: agr128; CHECK: br %r14129 %add = add i64 %a, -4294967296130 ret i64 %add131}132