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1; Test 16-bit signed ordered comparisons between memory and a constant.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s4 5; Check comparisons with 0.6define double @f1(double %a, double %b, ptr %ptr) {7; CHECK-LABEL: f1:8; CHECK: chhsi 0(%r2), 09; CHECK-NEXT: blr %r1410; CHECK: ldr %f0, %f211; CHECK: br %r1412 %val = load i16, ptr %ptr13 %cond = icmp slt i16 %val, 014 %res = select i1 %cond, double %a, double %b15 ret double %res16}17 18; Check comparisons with 1.19define double @f2(double %a, double %b, ptr %ptr) {20; CHECK-LABEL: f2:21; CHECK: chhsi 0(%r2), 022; CHECK-NEXT: bler %r1423; CHECK: ldr %f0, %f224; CHECK: br %r1425 %val = load i16, ptr %ptr26 %cond = icmp slt i16 %val, 127 %res = select i1 %cond, double %a, double %b28 ret double %res29}30 31; Check a value near the high end of the signed 16-bit range.32define double @f3(double %a, double %b, ptr %ptr) {33; CHECK-LABEL: f3:34; CHECK: chhsi 0(%r2), 3276635; CHECK-NEXT: blr %r1436; CHECK: ldr %f0, %f237; CHECK: br %r1438 %val = load i16, ptr %ptr39 %cond = icmp slt i16 %val, 3276640 %res = select i1 %cond, double %a, double %b41 ret double %res42}43 44; Check comparisons with -1.45define double @f4(double %a, double %b, ptr %ptr) {46; CHECK-LABEL: f4:47; CHECK: chhsi 0(%r2), -148; CHECK-NEXT: blr %r1449; CHECK: ldr %f0, %f250; CHECK: br %r1451 %val = load i16, ptr %ptr52 %cond = icmp slt i16 %val, -153 %res = select i1 %cond, double %a, double %b54 ret double %res55}56 57; Check a value near the low end of the 16-bit signed range.58define double @f5(double %a, double %b, ptr %ptr) {59; CHECK-LABEL: f5:60; CHECK: chhsi 0(%r2), -3276661; CHECK-NEXT: blr %r1462; CHECK: ldr %f0, %f263; CHECK: br %r1464 %val = load i16, ptr %ptr65 %cond = icmp slt i16 %val, -3276666 %res = select i1 %cond, double %a, double %b67 ret double %res68}69 70; Check the high end of the CHHSI range.71define double @f6(double %a, double %b, i16 %i1, ptr %base) {72; CHECK-LABEL: f6:73; CHECK: chhsi 4094(%r3), 074; CHECK-NEXT: blr %r1475; CHECK: ldr %f0, %f276; CHECK: br %r1477 %ptr = getelementptr i16, ptr %base, i64 204778 %val = load i16, ptr %ptr79 %cond = icmp slt i16 %val, 080 %res = select i1 %cond, double %a, double %b81 ret double %res82}83 84; Check the next halfword up, which needs separate address logic,85define double @f7(double %a, double %b, ptr %base) {86; CHECK-LABEL: f7:87; CHECK: aghi %r2, 409688; CHECK: chhsi 0(%r2), 089; CHECK-NEXT: blr %r1490; CHECK: ldr %f0, %f291; CHECK: br %r1492 %ptr = getelementptr i16, ptr %base, i64 204893 %val = load i16, ptr %ptr94 %cond = icmp slt i16 %val, 095 %res = select i1 %cond, double %a, double %b96 ret double %res97}98 99; Check negative offsets, which also need separate address logic.100define double @f8(double %a, double %b, ptr %base) {101; CHECK-LABEL: f8:102; CHECK: aghi %r2, -2103; CHECK: chhsi 0(%r2), 0104; CHECK-NEXT: blr %r14105; CHECK: ldr %f0, %f2106; CHECK: br %r14107 %ptr = getelementptr i16, ptr %base, i64 -1108 %val = load i16, ptr %ptr109 %cond = icmp slt i16 %val, 0110 %res = select i1 %cond, double %a, double %b111 ret double %res112}113 114; Check that CHHSI does not allow indices.115define double @f9(double %a, double %b, i64 %base, i64 %index) {116; CHECK-LABEL: f9:117; CHECK: agr {{%r2, %r3|%r3, %r2}}118; CHECK: chhsi 0({{%r[23]}}), 0119; CHECK-NEXT: blr %r14120; CHECK: ldr %f0, %f2121; CHECK: br %r14122 %add = add i64 %base, %index123 %ptr = inttoptr i64 %add to ptr124 %val = load i16, ptr %ptr125 %cond = icmp slt i16 %val, 0126 %res = select i1 %cond, double %a, double %b127 ret double %res128}129