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1; Test that compares are omitted if CC already has the right value2; (z196 version).3;4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 -no-integrated-as | FileCheck %s5 6; Addition provides enough for comparisons with zero if we know no7; signed overflow happens, which is when the "nsw" flag is set.8; First test the EQ case with LOC.9define i32 @f1(i32 %a, i32 %b, ptr %cptr) {10; CHECK-LABEL: f1:11; CHECK: afi %r2, 100000012; CHECK-NEXT: loce %r3, 0(%r4)13; CHECK: br %r1414 %add = add nsw i32 %a, 100000015 %cmp = icmp eq i32 %add, 016 %c = load i32, ptr %cptr17 %arg = select i1 %cmp, i32 %c, i32 %b18 call void asm sideeffect "blah $0", "{r3}"(i32 %arg)19 ret i32 %add20}21 22; ...and again with STOC.23define i32 @f2(i32 %a, i32 %b, ptr %cptr) {24; CHECK-LABEL: f2:25; CHECK: afi %r2, 100000026; CHECK-NEXT: stoce %r3, 0(%r4)27; CHECK: br %r1428 %add = add nsw i32 %a, 100000029 %cmp = icmp eq i32 %add, 030 %c = load i32, ptr %cptr31 %newval = select i1 %cmp, i32 %b, i32 %c32 store i32 %newval, ptr %cptr33 ret i32 %add34}35 36; Reverse the select order and test with LOCR.37define i32 @f3(i32 %a, i32 %b, i32 %c) {38; CHECK-LABEL: f3:39; CHECK: afi %r2, 100000040; CHECK-NEXT: locrlh %r3, %r441; CHECK: br %r1442 %add = add nsw i32 %a, 100000043 %cmp = icmp eq i32 %add, 044 %arg = select i1 %cmp, i32 %b, i32 %c45 call void asm sideeffect "blah $0", "{r3}"(i32 %arg)46 ret i32 %add47}48 49; ...and again with LOC.50define i32 @f4(i32 %a, i32 %b, ptr %cptr) {51; CHECK-LABEL: f4:52; CHECK: afi %r2, 100000053; CHECK-NEXT: loclh %r3, 0(%r4)54; CHECK: br %r1455 %add = add nsw i32 %a, 100000056 %cmp = icmp eq i32 %add, 057 %c = load i32, ptr %cptr58 %arg = select i1 %cmp, i32 %b, i32 %c59 call void asm sideeffect "blah $0", "{r3}"(i32 %arg)60 ret i32 %add61}62 63; ...and again with STOC.64define i32 @f5(i32 %a, i32 %b, ptr %cptr) {65; CHECK-LABEL: f5:66; CHECK: afi %r2, 100000067; CHECK-NEXT: stoclh %r3, 0(%r4)68; CHECK: br %r1469 %add = add nsw i32 %a, 100000070 %cmp = icmp eq i32 %add, 071 %c = load i32, ptr %cptr72 %newval = select i1 %cmp, i32 %c, i32 %b73 store i32 %newval, ptr %cptr74 ret i32 %add75}76 77; Change the EQ in f3 to NE.78define i32 @f6(i32 %a, i32 %b, i32 %c) {79; CHECK-LABEL: f6:80; CHECK: afi %r2, 100000081; CHECK-NEXT: locre %r3, %r482; CHECK: br %r1483 %add = add nsw i32 %a, 100000084 %cmp = icmp ne i32 %add, 085 %arg = select i1 %cmp, i32 %b, i32 %c86 call void asm sideeffect "blah $0", "{r3}"(i32 %arg)87 ret i32 %add88}89 90; ...and again with LOC.91define i32 @f7(i32 %a, i32 %b, ptr %cptr) {92; CHECK-LABEL: f7:93; CHECK: afi %r2, 100000094; CHECK-NEXT: loce %r3, 0(%r4)95; CHECK: br %r1496 %add = add nsw i32 %a, 100000097 %cmp = icmp ne i32 %add, 098 %c = load i32, ptr %cptr99 %arg = select i1 %cmp, i32 %b, i32 %c100 call void asm sideeffect "blah $0", "{r3}"(i32 %arg)101 ret i32 %add102}103 104; ...and again with STOC.105define i32 @f8(i32 %a, i32 %b, ptr %cptr) {106; CHECK-LABEL: f8:107; CHECK: afi %r2, 1000000108; CHECK-NEXT: stoce %r3, 0(%r4)109; CHECK: br %r14110 %add = add nsw i32 %a, 1000000111 %cmp = icmp ne i32 %add, 0112 %c = load i32, ptr %cptr113 %newval = select i1 %cmp, i32 %c, i32 %b114 store i32 %newval, ptr %cptr115 ret i32 %add116}117