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1; Test sign extensions from a halfword to an i32.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s4 5; Test register extension, starting with an i32.6define i32 @f1(i32 %a) {7; CHECK-LABEL: f1:8; CHECK: lhr %r2, %r29; CHECK: br %r1410 %half = trunc i32 %a to i1611 %ext = sext i16 %half to i3212 ret i32 %ext13}14 15; ...and again with an i64.16define i32 @f2(i64 %a) {17; CHECK-LABEL: f2:18; CHECK: lhr %r2, %r219; CHECK: br %r1420 %half = trunc i64 %a to i1621 %ext = sext i16 %half to i3222 ret i32 %ext23}24 25; Check the low end of the LH range.26define i32 @f3(ptr %src) {27; CHECK-LABEL: f3:28; CHECK: lh %r2, 0(%r2)29; CHECK: br %r1430 %half = load i16, ptr %src31 %ext = sext i16 %half to i3232 ret i32 %ext33}34 35; Check the high end of the LH range.36define i32 @f4(ptr %src) {37; CHECK-LABEL: f4:38; CHECK: lh %r2, 4094(%r2)39; CHECK: br %r1440 %ptr = getelementptr i16, ptr %src, i64 204741 %half = load i16, ptr %ptr42 %ext = sext i16 %half to i3243 ret i32 %ext44}45 46; Check the next halfword up, which needs LHY rather than LH.47define i32 @f5(ptr %src) {48; CHECK-LABEL: f5:49; CHECK: lhy %r2, 4096(%r2)50; CHECK: br %r1451 %ptr = getelementptr i16, ptr %src, i64 204852 %half = load i16, ptr %ptr53 %ext = sext i16 %half to i3254 ret i32 %ext55}56 57; Check the high end of the LHY range.58define i32 @f6(ptr %src) {59; CHECK-LABEL: f6:60; CHECK: lhy %r2, 524286(%r2)61; CHECK: br %r1462 %ptr = getelementptr i16, ptr %src, i64 26214363 %half = load i16, ptr %ptr64 %ext = sext i16 %half to i3265 ret i32 %ext66}67 68; Check the next halfword up, which needs separate address logic.69; Other sequences besides this one would be OK.70define i32 @f7(ptr %src) {71; CHECK-LABEL: f7:72; CHECK: agfi %r2, 52428873; CHECK: lh %r2, 0(%r2)74; CHECK: br %r1475 %ptr = getelementptr i16, ptr %src, i64 26214476 %half = load i16, ptr %ptr77 %ext = sext i16 %half to i3278 ret i32 %ext79}80 81; Check the high end of the negative LHY range.82define i32 @f8(ptr %src) {83; CHECK-LABEL: f8:84; CHECK: lhy %r2, -2(%r2)85; CHECK: br %r1486 %ptr = getelementptr i16, ptr %src, i64 -187 %half = load i16, ptr %ptr88 %ext = sext i16 %half to i3289 ret i32 %ext90}91 92; Check the low end of the LHY range.93define i32 @f9(ptr %src) {94; CHECK-LABEL: f9:95; CHECK: lhy %r2, -524288(%r2)96; CHECK: br %r1497 %ptr = getelementptr i16, ptr %src, i64 -26214498 %half = load i16, ptr %ptr99 %ext = sext i16 %half to i32100 ret i32 %ext101}102 103; Check the next halfword down, which needs separate address logic.104; Other sequences besides this one would be OK.105define i32 @f10(ptr %src) {106; CHECK-LABEL: f10:107; CHECK: agfi %r2, -524290108; CHECK: lh %r2, 0(%r2)109; CHECK: br %r14110 %ptr = getelementptr i16, ptr %src, i64 -262145111 %half = load i16, ptr %ptr112 %ext = sext i16 %half to i32113 ret i32 %ext114}115 116; Check that LH allows an index117define i32 @f11(i64 %src, i64 %index) {118; CHECK-LABEL: f11:119; CHECK: lh %r2, 4094(%r3,%r2)120; CHECK: br %r14121 %add1 = add i64 %src, %index122 %add2 = add i64 %add1, 4094123 %ptr = inttoptr i64 %add2 to ptr124 %half = load i16, ptr %ptr125 %ext = sext i16 %half to i32126 ret i32 %ext127}128 129; Check that LH allows an index130define i32 @f12(i64 %src, i64 %index) {131; CHECK-LABEL: f12:132; CHECK: lhy %r2, 4096(%r3,%r2)133; CHECK: br %r14134 %add1 = add i64 %src, %index135 %add2 = add i64 %add1, 4096136 %ptr = inttoptr i64 %add2 to ptr137 %half = load i16, ptr %ptr138 %ext = sext i16 %half to i32139 ret i32 %ext140}141 142; Test a case where we spill the source of at least one LHR. We want143; to use LH if possible.144define void @f13(ptr %ptr) {145; CHECK-LABEL: f13:146; CHECK: lh {{%r[0-9]+}}, 16{{[26]}}(%r15)147; CHECK: br %r14148 %val0 = load volatile i32, ptr %ptr149 %val1 = load volatile i32, ptr %ptr150 %val2 = load volatile i32, ptr %ptr151 %val3 = load volatile i32, ptr %ptr152 %val4 = load volatile i32, ptr %ptr153 %val5 = load volatile i32, ptr %ptr154 %val6 = load volatile i32, ptr %ptr155 %val7 = load volatile i32, ptr %ptr156 %val8 = load volatile i32, ptr %ptr157 %val9 = load volatile i32, ptr %ptr158 %val10 = load volatile i32, ptr %ptr159 %val11 = load volatile i32, ptr %ptr160 %val12 = load volatile i32, ptr %ptr161 %val13 = load volatile i32, ptr %ptr162 %val14 = load volatile i32, ptr %ptr163 %val15 = load volatile i32, ptr %ptr164 165 %trunc0 = trunc i32 %val0 to i16166 %trunc1 = trunc i32 %val1 to i16167 %trunc2 = trunc i32 %val2 to i16168 %trunc3 = trunc i32 %val3 to i16169 %trunc4 = trunc i32 %val4 to i16170 %trunc5 = trunc i32 %val5 to i16171 %trunc6 = trunc i32 %val6 to i16172 %trunc7 = trunc i32 %val7 to i16173 %trunc8 = trunc i32 %val8 to i16174 %trunc9 = trunc i32 %val9 to i16175 %trunc10 = trunc i32 %val10 to i16176 %trunc11 = trunc i32 %val11 to i16177 %trunc12 = trunc i32 %val12 to i16178 %trunc13 = trunc i32 %val13 to i16179 %trunc14 = trunc i32 %val14 to i16180 %trunc15 = trunc i32 %val15 to i16181 182 %ext0 = sext i16 %trunc0 to i32183 %ext1 = sext i16 %trunc1 to i32184 %ext2 = sext i16 %trunc2 to i32185 %ext3 = sext i16 %trunc3 to i32186 %ext4 = sext i16 %trunc4 to i32187 %ext5 = sext i16 %trunc5 to i32188 %ext6 = sext i16 %trunc6 to i32189 %ext7 = sext i16 %trunc7 to i32190 %ext8 = sext i16 %trunc8 to i32191 %ext9 = sext i16 %trunc9 to i32192 %ext10 = sext i16 %trunc10 to i32193 %ext11 = sext i16 %trunc11 to i32194 %ext12 = sext i16 %trunc12 to i32195 %ext13 = sext i16 %trunc13 to i32196 %ext14 = sext i16 %trunc14 to i32197 %ext15 = sext i16 %trunc15 to i32198 199 store volatile i32 %val0, ptr %ptr200 store volatile i32 %val1, ptr %ptr201 store volatile i32 %val2, ptr %ptr202 store volatile i32 %val3, ptr %ptr203 store volatile i32 %val4, ptr %ptr204 store volatile i32 %val5, ptr %ptr205 store volatile i32 %val6, ptr %ptr206 store volatile i32 %val7, ptr %ptr207 store volatile i32 %val8, ptr %ptr208 store volatile i32 %val9, ptr %ptr209 store volatile i32 %val10, ptr %ptr210 store volatile i32 %val11, ptr %ptr211 store volatile i32 %val12, ptr %ptr212 store volatile i32 %val13, ptr %ptr213 store volatile i32 %val14, ptr %ptr214 store volatile i32 %val15, ptr %ptr215 216 store volatile i32 %ext0, ptr %ptr217 store volatile i32 %ext1, ptr %ptr218 store volatile i32 %ext2, ptr %ptr219 store volatile i32 %ext3, ptr %ptr220 store volatile i32 %ext4, ptr %ptr221 store volatile i32 %ext5, ptr %ptr222 store volatile i32 %ext6, ptr %ptr223 store volatile i32 %ext7, ptr %ptr224 store volatile i32 %ext8, ptr %ptr225 store volatile i32 %ext9, ptr %ptr226 store volatile i32 %ext10, ptr %ptr227 store volatile i32 %ext11, ptr %ptr228 store volatile i32 %ext12, ptr %ptr229 store volatile i32 %ext13, ptr %ptr230 store volatile i32 %ext14, ptr %ptr231 store volatile i32 %ext15, ptr %ptr232 233 ret void234}235