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1; Test sign extensions from a halfword to an i64.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s4 5; Test register extension, starting with an i32.6define i64 @f1(i64 %a) {7; CHECK-LABEL: f1:8; CHECK: lghr %r2, %r29; CHECK: br %r1410 %half = trunc i64 %a to i1611 %ext = sext i16 %half to i6412 ret i64 %ext13}14 15; ...and again with an i64.16define i64 @f2(i32 %a) {17; CHECK-LABEL: f2:18; CHECK: lghr %r2, %r219; CHECK: br %r1420 %half = trunc i32 %a to i1621 %ext = sext i16 %half to i6422 ret i64 %ext23}24 25; Check LGH with no displacement.26define i64 @f3(ptr %src) {27; CHECK-LABEL: f3:28; CHECK: lgh %r2, 0(%r2)29; CHECK: br %r1430 %half = load i16, ptr %src31 %ext = sext i16 %half to i6432 ret i64 %ext33}34 35; Check the high end of the LGH range.36define i64 @f4(ptr %src) {37; CHECK-LABEL: f4:38; CHECK: lgh %r2, 524286(%r2)39; CHECK: br %r1440 %ptr = getelementptr i16, ptr %src, i64 26214341 %half = load i16, ptr %ptr42 %ext = sext i16 %half to i6443 ret i64 %ext44}45 46; Check the next halfword up, which needs separate address logic.47; Other sequences besides this one would be OK.48define i64 @f5(ptr %src) {49; CHECK-LABEL: f5:50; CHECK: agfi %r2, 52428851; CHECK: lgh %r2, 0(%r2)52; CHECK: br %r1453 %ptr = getelementptr i16, ptr %src, i64 26214454 %half = load i16, ptr %ptr55 %ext = sext i16 %half to i6456 ret i64 %ext57}58 59; Check the high end of the negative LGH range.60define i64 @f6(ptr %src) {61; CHECK-LABEL: f6:62; CHECK: lgh %r2, -2(%r2)63; CHECK: br %r1464 %ptr = getelementptr i16, ptr %src, i64 -165 %half = load i16, ptr %ptr66 %ext = sext i16 %half to i6467 ret i64 %ext68}69 70; Check the low end of the LGH range.71define i64 @f7(ptr %src) {72; CHECK-LABEL: f7:73; CHECK: lgh %r2, -524288(%r2)74; CHECK: br %r1475 %ptr = getelementptr i16, ptr %src, i64 -26214476 %half = load i16, ptr %ptr77 %ext = sext i16 %half to i6478 ret i64 %ext79}80 81; Check the next halfword down, which needs separate address logic.82; Other sequences besides this one would be OK.83define i64 @f8(ptr %src) {84; CHECK-LABEL: f8:85; CHECK: agfi %r2, -52429086; CHECK: lgh %r2, 0(%r2)87; CHECK: br %r1488 %ptr = getelementptr i16, ptr %src, i64 -26214589 %half = load i16, ptr %ptr90 %ext = sext i16 %half to i6491 ret i64 %ext92}93 94; Check that LGH allows an index.95define i64 @f9(i64 %src, i64 %index) {96; CHECK-LABEL: f9:97; CHECK: lgh %r2, 524287(%r3,%r2)98; CHECK: br %r1499 %add1 = add i64 %src, %index100 %add2 = add i64 %add1, 524287101 %ptr = inttoptr i64 %add2 to ptr102 %half = load i16, ptr %ptr103 %ext = sext i16 %half to i64104 ret i64 %ext105}106 107; Test a case where we spill the source of at least one LGHR. We want108; to use LGH if possible.109define void @f10(ptr %ptr) {110; CHECK-LABEL: f10:111; CHECK: lgh {{%r[0-9]+}}, 198(%r15)112; CHECK: br %r14113 %val0 = load volatile i64, ptr %ptr114 %val1 = load volatile i64, ptr %ptr115 %val2 = load volatile i64, ptr %ptr116 %val3 = load volatile i64, ptr %ptr117 %val4 = load volatile i64, ptr %ptr118 %val5 = load volatile i64, ptr %ptr119 %val6 = load volatile i64, ptr %ptr120 %val7 = load volatile i64, ptr %ptr121 %val8 = load volatile i64, ptr %ptr122 %val9 = load volatile i64, ptr %ptr123 %val10 = load volatile i64, ptr %ptr124 %val11 = load volatile i64, ptr %ptr125 %val12 = load volatile i64, ptr %ptr126 %val13 = load volatile i64, ptr %ptr127 %val14 = load volatile i64, ptr %ptr128 %val15 = load volatile i64, ptr %ptr129 130 %trunc0 = trunc i64 %val0 to i16131 %trunc1 = trunc i64 %val1 to i16132 %trunc2 = trunc i64 %val2 to i16133 %trunc3 = trunc i64 %val3 to i16134 %trunc4 = trunc i64 %val4 to i16135 %trunc5 = trunc i64 %val5 to i16136 %trunc6 = trunc i64 %val6 to i16137 %trunc7 = trunc i64 %val7 to i16138 %trunc8 = trunc i64 %val8 to i16139 %trunc9 = trunc i64 %val9 to i16140 %trunc10 = trunc i64 %val10 to i16141 %trunc11 = trunc i64 %val11 to i16142 %trunc12 = trunc i64 %val12 to i16143 %trunc13 = trunc i64 %val13 to i16144 %trunc14 = trunc i64 %val14 to i16145 %trunc15 = trunc i64 %val15 to i16146 147 %ext0 = sext i16 %trunc0 to i64148 %ext1 = sext i16 %trunc1 to i64149 %ext2 = sext i16 %trunc2 to i64150 %ext3 = sext i16 %trunc3 to i64151 %ext4 = sext i16 %trunc4 to i64152 %ext5 = sext i16 %trunc5 to i64153 %ext6 = sext i16 %trunc6 to i64154 %ext7 = sext i16 %trunc7 to i64155 %ext8 = sext i16 %trunc8 to i64156 %ext9 = sext i16 %trunc9 to i64157 %ext10 = sext i16 %trunc10 to i64158 %ext11 = sext i16 %trunc11 to i64159 %ext12 = sext i16 %trunc12 to i64160 %ext13 = sext i16 %trunc13 to i64161 %ext14 = sext i16 %trunc14 to i64162 %ext15 = sext i16 %trunc15 to i64163 164 store volatile i64 %val0, ptr %ptr165 store volatile i64 %val1, ptr %ptr166 store volatile i64 %val2, ptr %ptr167 store volatile i64 %val3, ptr %ptr168 store volatile i64 %val4, ptr %ptr169 store volatile i64 %val5, ptr %ptr170 store volatile i64 %val6, ptr %ptr171 store volatile i64 %val7, ptr %ptr172 store volatile i64 %val8, ptr %ptr173 store volatile i64 %val9, ptr %ptr174 store volatile i64 %val10, ptr %ptr175 store volatile i64 %val11, ptr %ptr176 store volatile i64 %val12, ptr %ptr177 store volatile i64 %val13, ptr %ptr178 store volatile i64 %val14, ptr %ptr179 store volatile i64 %val15, ptr %ptr180 181 store volatile i64 %ext0, ptr %ptr182 store volatile i64 %ext1, ptr %ptr183 store volatile i64 %ext2, ptr %ptr184 store volatile i64 %ext3, ptr %ptr185 store volatile i64 %ext4, ptr %ptr186 store volatile i64 %ext5, ptr %ptr187 store volatile i64 %ext6, ptr %ptr188 store volatile i64 %ext7, ptr %ptr189 store volatile i64 %ext8, ptr %ptr190 store volatile i64 %ext9, ptr %ptr191 store volatile i64 %ext10, ptr %ptr192 store volatile i64 %ext11, ptr %ptr193 store volatile i64 %ext12, ptr %ptr194 store volatile i64 %ext13, ptr %ptr195 store volatile i64 %ext14, ptr %ptr196 store volatile i64 %ext15, ptr %ptr197 198 ret void199}200