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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; Test 128-bit arithmetic in vector registers on z173;4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z17 | FileCheck %s5 6; Sign extension from i64.7define i128 @f1(i64 %a) {8; CHECK-LABEL: f1:9; CHECK: # %bb.0:10; CHECK-NEXT: vlvgp %v0, %r3, %r311; CHECK-NEXT: vuplg %v0, %v012; CHECK-NEXT: vst %v0, 0(%r2), 313; CHECK-NEXT: br %r1414 %res = sext i64 %a to i12815 ret i128 %res16}17 18; Sign extension from i64 from memory.19define i128 @f2(ptr %ptr) {20; CHECK-LABEL: f2:21; CHECK: # %bb.0:22; CHECK-NEXT: vlrepg %v0, 0(%r3)23; CHECK-NEXT: vrepib %v1, 6424; CHECK-NEXT: vsrab %v0, %v0, %v125; CHECK-NEXT: vst %v0, 0(%r2), 326; CHECK-NEXT: br %r1427 %a = load i64, ptr %ptr28 %res = sext i64 %a to i12829 ret i128 %res30}31 32; Zero extension from i64.33define i128 @f3(i64 %a) {34; CHECK-LABEL: f3:35; CHECK: # %bb.0:36; CHECK-NEXT: vgbm %v0, 037; CHECK-NEXT: vlvgg %v0, %r3, 138; CHECK-NEXT: vst %v0, 0(%r2), 339; CHECK-NEXT: br %r1440 %res = zext i64 %a to i12841 ret i128 %res42}43 44; Zero extension from i64 from memory.45define i128 @f4(ptr %ptr) {46; CHECK-LABEL: f4:47; CHECK: # %bb.0:48; CHECK-NEXT: vgbm %v0, 049; CHECK-NEXT: vleg %v0, 0(%r3), 150; CHECK-NEXT: vst %v0, 0(%r2), 351; CHECK-NEXT: br %r1452 %a = load i64, ptr %ptr53 %res = zext i64 %a to i12854 ret i128 %res55}56 57; Truncation to i64.58define i64 @f5(i128 %a, i128 %b) {59; CHECK-LABEL: f5:60; CHECK: # %bb.0:61; CHECK-NEXT: vl %v0, 0(%r3), 362; CHECK-NEXT: vl %v1, 0(%r2), 363; CHECK-NEXT: vaq %v0, %v1, %v064; CHECK-NEXT: vlgvg %r2, %v0, 165; CHECK-NEXT: br %r1466 %op = add i128 %a, %b67 %res = trunc i128 %op to i6468 ret i64 %res69}70 71; Truncation to i64 in memory.72define void @f6(ptr %ptr, i128 %a) {73; CHECK-LABEL: f6:74; CHECK: # %bb.0:75; CHECK-NEXT: vl %v0, 0(%r3), 376; CHECK-NEXT: vaq %v0, %v0, %v077; CHECK-NEXT: vsteg %v0, 0(%r2), 178; CHECK-NEXT: br %r1479 %op = add i128 %a, %a80 %res = trunc i128 %op to i6481 store i64 %res, ptr %ptr82 ret void83}84 85; Sign extension from i32.86define i128 @f7(i32 %a) {87; CHECK-LABEL: f7:88; CHECK: # %bb.0:89; CHECK-NEXT: lgfr %r0, %r390; CHECK-NEXT: vlvgp %v0, %r0, %r091; CHECK-NEXT: vuplg %v0, %v092; CHECK-NEXT: vst %v0, 0(%r2), 393; CHECK-NEXT: br %r1494 %res = sext i32 %a to i12895 ret i128 %res96}97 98; Sign extension from i32 from memory.99define i128 @f8(ptr %ptr) {100; CHECK-LABEL: f8:101; CHECK: # %bb.0:102; CHECK-NEXT: vlrepf %v0, 0(%r3)103; CHECK-NEXT: vrepib %v1, 96104; CHECK-NEXT: vsrab %v0, %v0, %v1105; CHECK-NEXT: vst %v0, 0(%r2), 3106; CHECK-NEXT: br %r14107 %a = load i32, ptr %ptr108 %res = sext i32 %a to i128109 ret i128 %res110}111 112; Zero extension from i32.113define i128 @f9(i32 %a) {114; CHECK-LABEL: f9:115; CHECK: # %bb.0:116; CHECK-NEXT: vgbm %v0, 0117; CHECK-NEXT: vlvgf %v0, %r3, 3118; CHECK-NEXT: vst %v0, 0(%r2), 3119; CHECK-NEXT: br %r14120 %res = zext i32 %a to i128121 ret i128 %res122}123 124; Zero extension from i32 from memory.125define i128 @f10(ptr %ptr) {126; CHECK-LABEL: f10:127; CHECK: # %bb.0:128; CHECK-NEXT: vgbm %v0, 0129; CHECK-NEXT: vlef %v0, 0(%r3), 3130; CHECK-NEXT: vst %v0, 0(%r2), 3131; CHECK-NEXT: br %r14132 %a = load i32, ptr %ptr133 %res = zext i32 %a to i128134 ret i128 %res135}136 137; Truncation to i32.138define i32 @f11(i128 %a, i128 %b) {139; CHECK-LABEL: f11:140; CHECK: # %bb.0:141; CHECK-NEXT: vl %v0, 0(%r3), 3142; CHECK-NEXT: vl %v1, 0(%r2), 3143; CHECK-NEXT: vaq %v0, %v1, %v0144; CHECK-NEXT: vlgvf %r2, %v0, 3145; CHECK-NEXT: # kill: def $r2l killed $r2l killed $r2d146; CHECK-NEXT: br %r14147 %op = add i128 %a, %b148 %res = trunc i128 %op to i32149 ret i32 %res150}151 152; Truncation to i32 in memory.153define void @f12(ptr %ptr, i128 %a) {154; CHECK-LABEL: f12:155; CHECK: # %bb.0:156; CHECK-NEXT: vl %v0, 0(%r3), 3157; CHECK-NEXT: vaq %v0, %v0, %v0158; CHECK-NEXT: vstef %v0, 0(%r2), 3159; CHECK-NEXT: br %r14160 %op = add i128 %a, %a161 %res = trunc i128 %op to i32162 store i32 %res, ptr %ptr163 ret void164}165 166; Sign extension from i16.167define i128 @f13(i16 %a) {168; CHECK-LABEL: f13:169; CHECK: # %bb.0:170; CHECK-NEXT: # kill: def $r3l killed $r3l def $r3d171; CHECK-NEXT: lghr %r0, %r3172; CHECK-NEXT: vlvgp %v0, %r0, %r0173; CHECK-NEXT: vuplg %v0, %v0174; CHECK-NEXT: vst %v0, 0(%r2), 3175; CHECK-NEXT: br %r14176 %res = sext i16 %a to i128177 ret i128 %res178}179 180; Sign extension from i16 from memory.181define i128 @f14(ptr %ptr) {182; CHECK-LABEL: f14:183; CHECK: # %bb.0:184; CHECK-NEXT: vlreph %v0, 0(%r3)185; CHECK-NEXT: vrepib %v1, 112186; CHECK-NEXT: vsrab %v0, %v0, %v1187; CHECK-NEXT: vst %v0, 0(%r2), 3188; CHECK-NEXT: br %r14189 %a = load i16, ptr %ptr190 %res = sext i16 %a to i128191 ret i128 %res192}193 194; Zero extension from i16.195define i128 @f15(i16 %a) {196; CHECK-LABEL: f15:197; CHECK: # %bb.0:198; CHECK-NEXT: vgbm %v0, 0199; CHECK-NEXT: vlvgh %v0, %r3, 7200; CHECK-NEXT: vst %v0, 0(%r2), 3201; CHECK-NEXT: br %r14202 %res = zext i16 %a to i128203 ret i128 %res204}205 206; Zero extension from i16 from memory.207define i128 @f16(ptr %ptr) {208; CHECK-LABEL: f16:209; CHECK: # %bb.0:210; CHECK-NEXT: vgbm %v0, 0211; CHECK-NEXT: vleh %v0, 0(%r3), 7212; CHECK-NEXT: vst %v0, 0(%r2), 3213; CHECK-NEXT: br %r14214 %a = load i16, ptr %ptr215 %res = zext i16 %a to i128216 ret i128 %res217}218 219; Truncation to i16.220define i16 @f17(i128 %a, i128 %b) {221; CHECK-LABEL: f17:222; CHECK: # %bb.0:223; CHECK-NEXT: vl %v0, 0(%r3), 3224; CHECK-NEXT: vl %v1, 0(%r2), 3225; CHECK-NEXT: vaq %v0, %v1, %v0226; CHECK-NEXT: vlgvf %r2, %v0, 3227; CHECK-NEXT: # kill: def $r2l killed $r2l killed $r2d228; CHECK-NEXT: br %r14229 %op = add i128 %a, %b230 %res = trunc i128 %op to i16231 ret i16 %res232}233 234; Truncation to i16 in memory.235define void @f18(ptr %ptr, i128 %a) {236; CHECK-LABEL: f18:237; CHECK: # %bb.0:238; CHECK-NEXT: vl %v0, 0(%r3), 3239; CHECK-NEXT: vaq %v0, %v0, %v0240; CHECK-NEXT: vsteh %v0, 0(%r2), 7241; CHECK-NEXT: br %r14242 %op = add i128 %a, %a243 %res = trunc i128 %op to i16244 store i16 %res, ptr %ptr245 ret void246}247 248; Sign extension from i8.249define i128 @f19(i8 %a) {250; CHECK-LABEL: f19:251; CHECK: # %bb.0:252; CHECK-NEXT: # kill: def $r3l killed $r3l def $r3d253; CHECK-NEXT: lgbr %r0, %r3254; CHECK-NEXT: vlvgp %v0, %r0, %r0255; CHECK-NEXT: vuplg %v0, %v0256; CHECK-NEXT: vst %v0, 0(%r2), 3257; CHECK-NEXT: br %r14258 %res = sext i8 %a to i128259 ret i128 %res260}261 262; Sign extension from i8 from memory.263define i128 @f20(ptr %ptr) {264; CHECK-LABEL: f20:265; CHECK: # %bb.0:266; CHECK-NEXT: vlrepb %v0, 0(%r3)267; CHECK-NEXT: vrepib %v1, 120268; CHECK-NEXT: vsrab %v0, %v0, %v1269; CHECK-NEXT: vst %v0, 0(%r2), 3270; CHECK-NEXT: br %r14271 %a = load i8, ptr %ptr272 %res = sext i8 %a to i128273 ret i128 %res274}275 276; Zero extension from i8.277define i128 @f21(i8 %a) {278; CHECK-LABEL: f21:279; CHECK: # %bb.0:280; CHECK-NEXT: vgbm %v0, 0281; CHECK-NEXT: vlvgb %v0, %r3, 15282; CHECK-NEXT: vst %v0, 0(%r2), 3283; CHECK-NEXT: br %r14284 %res = zext i8 %a to i128285 ret i128 %res286}287 288; Zero extension from i8 from memory.289define i128 @f22(ptr %ptr) {290; CHECK-LABEL: f22:291; CHECK: # %bb.0:292; CHECK-NEXT: vgbm %v0, 0293; CHECK-NEXT: vleb %v0, 0(%r3), 15294; CHECK-NEXT: vst %v0, 0(%r2), 3295; CHECK-NEXT: br %r14296 %a = load i8, ptr %ptr297 %res = zext i8 %a to i128298 ret i128 %res299}300 301; Truncation to i8.302define i8 @f23(i128 %a, i128 %b) {303; CHECK-LABEL: f23:304; CHECK: # %bb.0:305; CHECK-NEXT: vl %v0, 0(%r3), 3306; CHECK-NEXT: vl %v1, 0(%r2), 3307; CHECK-NEXT: vaq %v0, %v1, %v0308; CHECK-NEXT: vlgvf %r2, %v0, 3309; CHECK-NEXT: # kill: def $r2l killed $r2l killed $r2d310; CHECK-NEXT: br %r14311 %op = add i128 %a, %b312 %res = trunc i128 %op to i8313 ret i8 %res314}315 316; Truncation to i8 in memory.317define void @f24(ptr %ptr, i128 %a) {318; CHECK-LABEL: f24:319; CHECK: # %bb.0:320; CHECK-NEXT: vl %v0, 0(%r3), 3321; CHECK-NEXT: vaq %v0, %v0, %v0322; CHECK-NEXT: vsteb %v0, 0(%r2), 15323; CHECK-NEXT: br %r14324 %op = add i128 %a, %a325 %res = trunc i128 %op to i8326 store i8 %res, ptr %ptr327 ret void328}329 330; Sign extension from i1.331define i128 @f25(i1 %a) {332; CHECK-LABEL: f25:333; CHECK: # %bb.0:334; CHECK-NEXT: larl %r1, .LCPI24_0335; CHECK-NEXT: vl %v1, 0(%r1), 3336; CHECK-NEXT: vlvgp %v0, %r3, %r3337; CHECK-NEXT: vn %v0, %v0, %v1338; CHECK-NEXT: vlcq %v0, %v0339; CHECK-NEXT: vst %v0, 0(%r2), 3340; CHECK-NEXT: br %r14341 %res = sext i1 %a to i128342 ret i128 %res343}344 345; Sign extension from i1 from memory.346define i128 @f26(ptr %ptr) {347; CHECK-LABEL: f26:348; CHECK: # %bb.0:349; CHECK-NEXT: vgbm %v0, 0350; CHECK-NEXT: vleb %v0, 0(%r3), 15351; CHECK-NEXT: larl %r1, .LCPI25_0352; CHECK-NEXT: vl %v1, 0(%r1), 3353; CHECK-NEXT: vn %v0, %v0, %v1354; CHECK-NEXT: vlcq %v0, %v0355; CHECK-NEXT: vst %v0, 0(%r2), 3356; CHECK-NEXT: br %r14357 %a = load i1, ptr %ptr358 %res = sext i1 %a to i128359 ret i128 %res360}361 362; Zero extension from i1.363define i128 @f27(i1 %a) {364; CHECK-LABEL: f27:365; CHECK: # %bb.0:366; CHECK-NEXT: larl %r1, .LCPI26_0367; CHECK-NEXT: vl %v1, 0(%r1), 3368; CHECK-NEXT: vlvgp %v0, %r3, %r3369; CHECK-NEXT: vn %v0, %v0, %v1370; CHECK-NEXT: vst %v0, 0(%r2), 3371; CHECK-NEXT: br %r14372 %res = zext i1 %a to i128373 ret i128 %res374}375 376; Zero extension from i1 from memory.377define i128 @f28(ptr %ptr) {378; CHECK-LABEL: f28:379; CHECK: # %bb.0:380; CHECK-NEXT: vgbm %v0, 0381; CHECK-NEXT: vleb %v0, 0(%r3), 15382; CHECK-NEXT: vst %v0, 0(%r2), 3383; CHECK-NEXT: br %r14384 %a = load i1, ptr %ptr385 %res = zext i1 %a to i128386 ret i128 %res387}388 389; Truncation to i1.390define i1 @f29(i128 %a, i128 %b) {391; CHECK-LABEL: f29:392; CHECK: # %bb.0:393; CHECK-NEXT: vl %v0, 0(%r3), 3394; CHECK-NEXT: vl %v1, 0(%r2), 3395; CHECK-NEXT: vaq %v0, %v1, %v0396; CHECK-NEXT: vlgvf %r2, %v0, 3397; CHECK-NEXT: # kill: def $r2l killed $r2l killed $r2d398; CHECK-NEXT: br %r14399 %op = add i128 %a, %b400 %res = trunc i128 %op to i1401 ret i1 %res402}403 404; Truncation to i1 in memory.405define void @f30(ptr %ptr, i128 %a) {406; CHECK-LABEL: f30:407; CHECK: # %bb.0:408; CHECK-NEXT: vl %v0, 0(%r3), 3409; CHECK-NEXT: larl %r1, .LCPI29_0410; CHECK-NEXT: vl %v1, 0(%r1), 3411; CHECK-NEXT: vaq %v0, %v0, %v0412; CHECK-NEXT: vn %v0, %v0, %v1413; CHECK-NEXT: vsteb %v0, 0(%r2), 15414; CHECK-NEXT: br %r14415 %op = add i128 %a, %a416 %res = trunc i128 %op to i1417 store i1 %res, ptr %ptr418 ret void419}420