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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; Test i128 minimum on z13.3;4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s5 6; Test with slt.7define i128 @f1(i128 %val1, i128 %val2) {8; CHECK-LABEL: f1:9; CHECK: # %bb.0:10; CHECK-NEXT: vl %v0, 0(%r4), 311; CHECK-NEXT: vl %v1, 0(%r3), 312; CHECK-NEXT: vecg %v0, %v113; CHECK-NEXT: je .LBB0_314; CHECK-NEXT: # %bb.1:15; CHECK-NEXT: jnl .LBB0_416; CHECK-NEXT: .LBB0_2:17; CHECK-NEXT: vst %v0, 0(%r2), 318; CHECK-NEXT: br %r1419; CHECK-NEXT: .LBB0_3:20; CHECK-NEXT: vchlgs %v2, %v1, %v021; CHECK-NEXT: jl .LBB0_222; CHECK-NEXT: .LBB0_4:23; CHECK-NEXT: vlr %v0, %v124; CHECK-NEXT: vst %v0, 0(%r2), 325; CHECK-NEXT: br %r1426 %cmp = icmp slt i128 %val2, %val127 %ret = select i1 %cmp, i128 %val2, i128 %val128 ret i128 %ret29}30 31; Test with sle.32define i128 @f2(i128 %val1, i128 %val2) {33; CHECK-LABEL: f2:34; CHECK: # %bb.0:35; CHECK-NEXT: vl %v1, 0(%r3), 336; CHECK-NEXT: vl %v0, 0(%r4), 337; CHECK-NEXT: vecg %v1, %v038; CHECK-NEXT: je .LBB1_339; CHECK-NEXT: # %bb.1:40; CHECK-NEXT: jl .LBB1_441; CHECK-NEXT: .LBB1_2:42; CHECK-NEXT: vst %v0, 0(%r2), 343; CHECK-NEXT: br %r1444; CHECK-NEXT: .LBB1_3:45; CHECK-NEXT: vchlgs %v2, %v0, %v146; CHECK-NEXT: jnl .LBB1_247; CHECK-NEXT: .LBB1_4:48; CHECK-NEXT: vlr %v0, %v149; CHECK-NEXT: vst %v0, 0(%r2), 350; CHECK-NEXT: br %r1451 %cmp = icmp sle i128 %val2, %val152 %ret = select i1 %cmp, i128 %val2, i128 %val153 ret i128 %ret54}55 56; Test with sgt.57define i128 @f3(i128 %val1, i128 %val2) {58; CHECK-LABEL: f3:59; CHECK: # %bb.0:60; CHECK-NEXT: vl %v0, 0(%r3), 361; CHECK-NEXT: vl %v1, 0(%r4), 362; CHECK-NEXT: vecg %v0, %v163; CHECK-NEXT: je .LBB2_364; CHECK-NEXT: # %bb.1:65; CHECK-NEXT: jnl .LBB2_466; CHECK-NEXT: .LBB2_2:67; CHECK-NEXT: vst %v0, 0(%r2), 368; CHECK-NEXT: br %r1469; CHECK-NEXT: .LBB2_3:70; CHECK-NEXT: vchlgs %v2, %v1, %v071; CHECK-NEXT: jl .LBB2_272; CHECK-NEXT: .LBB2_4:73; CHECK-NEXT: vlr %v0, %v174; CHECK-NEXT: vst %v0, 0(%r2), 375; CHECK-NEXT: br %r1476 %cmp = icmp sgt i128 %val2, %val177 %ret = select i1 %cmp, i128 %val1, i128 %val278 ret i128 %ret79}80 81; Test with sge.82define i128 @f4(i128 %val1, i128 %val2) {83; CHECK-LABEL: f4:84; CHECK: # %bb.0:85; CHECK-NEXT: vl %v1, 0(%r4), 386; CHECK-NEXT: vl %v0, 0(%r3), 387; CHECK-NEXT: vecg %v1, %v088; CHECK-NEXT: je .LBB3_389; CHECK-NEXT: # %bb.1:90; CHECK-NEXT: jl .LBB3_491; CHECK-NEXT: .LBB3_2:92; CHECK-NEXT: vst %v0, 0(%r2), 393; CHECK-NEXT: br %r1494; CHECK-NEXT: .LBB3_3:95; CHECK-NEXT: vchlgs %v2, %v0, %v196; CHECK-NEXT: jnl .LBB3_297; CHECK-NEXT: .LBB3_4:98; CHECK-NEXT: vlr %v0, %v199; CHECK-NEXT: vst %v0, 0(%r2), 3100; CHECK-NEXT: br %r14101 %cmp = icmp sge i128 %val2, %val1102 %ret = select i1 %cmp, i128 %val1, i128 %val2103 ret i128 %ret104}105 106; Test with ult.107define i128 @f5(i128 %val1, i128 %val2) {108; CHECK-LABEL: f5:109; CHECK: # %bb.0:110; CHECK-NEXT: vl %v0, 0(%r4), 3111; CHECK-NEXT: vl %v1, 0(%r3), 3112; CHECK-NEXT: veclg %v0, %v1113; CHECK-NEXT: je .LBB4_3114; CHECK-NEXT: # %bb.1:115; CHECK-NEXT: jnl .LBB4_4116; CHECK-NEXT: .LBB4_2:117; CHECK-NEXT: vst %v0, 0(%r2), 3118; CHECK-NEXT: br %r14119; CHECK-NEXT: .LBB4_3:120; CHECK-NEXT: vchlgs %v2, %v1, %v0121; CHECK-NEXT: jl .LBB4_2122; CHECK-NEXT: .LBB4_4:123; CHECK-NEXT: vlr %v0, %v1124; CHECK-NEXT: vst %v0, 0(%r2), 3125; CHECK-NEXT: br %r14126 %cmp = icmp ult i128 %val2, %val1127 %ret = select i1 %cmp, i128 %val2, i128 %val1128 ret i128 %ret129}130 131; Test with ule.132define i128 @f6(i128 %val1, i128 %val2) {133; CHECK-LABEL: f6:134; CHECK: # %bb.0:135; CHECK-NEXT: vl %v1, 0(%r3), 3136; CHECK-NEXT: vl %v0, 0(%r4), 3137; CHECK-NEXT: veclg %v1, %v0138; CHECK-NEXT: je .LBB5_3139; CHECK-NEXT: # %bb.1:140; CHECK-NEXT: jl .LBB5_4141; CHECK-NEXT: .LBB5_2:142; CHECK-NEXT: vst %v0, 0(%r2), 3143; CHECK-NEXT: br %r14144; CHECK-NEXT: .LBB5_3:145; CHECK-NEXT: vchlgs %v2, %v0, %v1146; CHECK-NEXT: jnl .LBB5_2147; CHECK-NEXT: .LBB5_4:148; CHECK-NEXT: vlr %v0, %v1149; CHECK-NEXT: vst %v0, 0(%r2), 3150; CHECK-NEXT: br %r14151 %cmp = icmp ule i128 %val2, %val1152 %ret = select i1 %cmp, i128 %val2, i128 %val1153 ret i128 %ret154}155 156; Test with ugt.157define i128 @f7(i128 %val1, i128 %val2) {158; CHECK-LABEL: f7:159; CHECK: # %bb.0:160; CHECK-NEXT: vl %v0, 0(%r3), 3161; CHECK-NEXT: vl %v1, 0(%r4), 3162; CHECK-NEXT: veclg %v0, %v1163; CHECK-NEXT: je .LBB6_3164; CHECK-NEXT: # %bb.1:165; CHECK-NEXT: jnl .LBB6_4166; CHECK-NEXT: .LBB6_2:167; CHECK-NEXT: vst %v0, 0(%r2), 3168; CHECK-NEXT: br %r14169; CHECK-NEXT: .LBB6_3:170; CHECK-NEXT: vchlgs %v2, %v1, %v0171; CHECK-NEXT: jl .LBB6_2172; CHECK-NEXT: .LBB6_4:173; CHECK-NEXT: vlr %v0, %v1174; CHECK-NEXT: vst %v0, 0(%r2), 3175; CHECK-NEXT: br %r14176 %cmp = icmp ugt i128 %val2, %val1177 %ret = select i1 %cmp, i128 %val1, i128 %val2178 ret i128 %ret179}180 181; Test with uge.182define i128 @f8(i128 %val1, i128 %val2) {183; CHECK-LABEL: f8:184; CHECK: # %bb.0:185; CHECK-NEXT: vl %v1, 0(%r4), 3186; CHECK-NEXT: vl %v0, 0(%r3), 3187; CHECK-NEXT: veclg %v1, %v0188; CHECK-NEXT: je .LBB7_3189; CHECK-NEXT: # %bb.1:190; CHECK-NEXT: jl .LBB7_4191; CHECK-NEXT: .LBB7_2:192; CHECK-NEXT: vst %v0, 0(%r2), 3193; CHECK-NEXT: br %r14194; CHECK-NEXT: .LBB7_3:195; CHECK-NEXT: vchlgs %v2, %v0, %v1196; CHECK-NEXT: jnl .LBB7_2197; CHECK-NEXT: .LBB7_4:198; CHECK-NEXT: vlr %v0, %v1199; CHECK-NEXT: vst %v0, 0(%r2), 3200; CHECK-NEXT: br %r14201 %cmp = icmp uge i128 %val2, %val1202 %ret = select i1 %cmp, i128 %val1, i128 %val2203 ret i128 %ret204}205