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1; Test 64-bit addition in which the second operand is constant.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s5 6declare i32 @foo()7 8; Check additions of 1.9define zeroext i1 @f1(i64 %dummy, i64 %a, ptr %res) {10; CHECK-LABEL: f1:11; CHECK: aghi %r3, 112; CHECK-DAG: stg %r3, 0(%r4)13; CHECK-DAG: ipm [[REG:%r[0-5]]]14; CHECK-DAG: afi [[REG]], 134217728015; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 3316; CHECK: br %r1417 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 1)18 %val = extractvalue {i64, i1} %t, 019 %obit = extractvalue {i64, i1} %t, 120 store i64 %val, ptr %res21 ret i1 %obit22 23}24 25; Check the high end of the AGHI range.26define zeroext i1 @f2(i64 %dummy, i64 %a, ptr %res) {27; CHECK-LABEL: f2:28; CHECK: aghi %r3, 3276729; CHECK-DAG: stg %r3, 0(%r4)30; CHECK-DAG: ipm [[REG:%r[0-5]]]31; CHECK-DAG: afi [[REG]], 134217728032; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 3333; CHECK: br %r1434 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 32767)35 %val = extractvalue {i64, i1} %t, 036 %obit = extractvalue {i64, i1} %t, 137 store i64 %val, ptr %res38 ret i1 %obit39}40 41; Check the next value up, which must use AGFI instead.42define zeroext i1 @f3(i64 %dummy, i64 %a, ptr %res) {43; CHECK-LABEL: f3:44; CHECK: agfi %r3, 3276845; CHECK-DAG: stg %r3, 0(%r4)46; CHECK-DAG: ipm [[REG:%r[0-5]]]47; CHECK-DAG: afi [[REG]], 134217728048; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 3349; CHECK: br %r1450 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 32768)51 %val = extractvalue {i64, i1} %t, 052 %obit = extractvalue {i64, i1} %t, 153 store i64 %val, ptr %res54 ret i1 %obit55}56 57; Check the high end of the AGFI range.58define zeroext i1 @f4(i64 %dummy, i64 %a, ptr %res) {59; CHECK-LABEL: f4:60; CHECK: agfi %r3, 214748364761; CHECK-DAG: stg %r3, 0(%r4)62; CHECK-DAG: ipm [[REG:%r[0-5]]]63; CHECK-DAG: afi [[REG]], 134217728064; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 3365; CHECK: br %r1466 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 2147483647)67 %val = extractvalue {i64, i1} %t, 068 %obit = extractvalue {i64, i1} %t, 169 store i64 %val, ptr %res70 ret i1 %obit71}72 73; Check the next value up, which must be loaded into a register first.74define zeroext i1 @f5(i64 %dummy, i64 %a, ptr %res) {75; CHECK-LABEL: f5:76; CHECK: llilh [[REG1:%r[0-9]+]], 3276877; CHECK: agr [[REG1]], %r378; CHECK-DAG: stg [[REG1]], 0(%r4)79; CHECK-DAG: ipm [[REG:%r[0-5]]]80; CHECK-DAG: afi [[REG]], 134217728081; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 3382; CHECK: br %r1483 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 2147483648)84 %val = extractvalue {i64, i1} %t, 085 %obit = extractvalue {i64, i1} %t, 186 store i64 %val, ptr %res87 ret i1 %obit88}89 90; Check the high end of the negative AGHI range.91define zeroext i1 @f6(i64 %dummy, i64 %a, ptr %res) {92; CHECK-LABEL: f6:93; CHECK: aghi %r3, -194; CHECK-DAG: stg %r3, 0(%r4)95; CHECK-DAG: ipm [[REG:%r[0-5]]]96; CHECK-DAG: afi [[REG]], 134217728097; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 3398; CHECK: br %r1499 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 -1)100 %val = extractvalue {i64, i1} %t, 0101 %obit = extractvalue {i64, i1} %t, 1102 store i64 %val, ptr %res103 ret i1 %obit104}105 106; Check the low end of the AGHI range.107define zeroext i1 @f7(i64 %dummy, i64 %a, ptr %res) {108; CHECK-LABEL: f7:109; CHECK: aghi %r3, -32768110; CHECK-DAG: stg %r3, 0(%r4)111; CHECK-DAG: ipm [[REG:%r[0-5]]]112; CHECK-DAG: afi [[REG]], 1342177280113; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33114; CHECK: br %r14115 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 -32768)116 %val = extractvalue {i64, i1} %t, 0117 %obit = extractvalue {i64, i1} %t, 1118 store i64 %val, ptr %res119 ret i1 %obit120}121 122; Check the next value down, which must use AGFI instead.123define zeroext i1 @f8(i64 %dummy, i64 %a, ptr %res) {124; CHECK-LABEL: f8:125; CHECK: agfi %r3, -32769126; CHECK-DAG: stg %r3, 0(%r4)127; CHECK-DAG: ipm [[REG:%r[0-5]]]128; CHECK-DAG: afi [[REG]], 1342177280129; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33130; CHECK: br %r14131 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 -32769)132 %val = extractvalue {i64, i1} %t, 0133 %obit = extractvalue {i64, i1} %t, 1134 store i64 %val, ptr %res135 ret i1 %obit136}137 138; Check the low end of the AGFI range.139define zeroext i1 @f9(i64 %dummy, i64 %a, ptr %res) {140; CHECK-LABEL: f9:141; CHECK: agfi %r3, -2147483648142; CHECK-DAG: stg %r3, 0(%r4)143; CHECK-DAG: ipm [[REG:%r[0-5]]]144; CHECK-DAG: afi [[REG]], 1342177280145; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33146; CHECK: br %r14147 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 -2147483648)148 %val = extractvalue {i64, i1} %t, 0149 %obit = extractvalue {i64, i1} %t, 1150 store i64 %val, ptr %res151 ret i1 %obit152}153 154; Check the next value down, which can use register subtraction instead.155define zeroext i1 @f10(i64 %dummy, i64 %a, ptr %res) {156; CHECK-LABEL: f10:157; CHECK: llilf [[REG1:%r[0-9]+]], 2147483649158; CHECK: sgr %r3, [[REG1]]159; CHECK-DAG: stg %r3, 0(%r4)160; CHECK-DAG: ipm [[REG:%r[0-5]]]161; CHECK-DAG: afi [[REG]], 1342177280162; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33163; CHECK: br %r14164 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 -2147483649)165 %val = extractvalue {i64, i1} %t, 0166 %obit = extractvalue {i64, i1} %t, 1167 store i64 %val, ptr %res168 ret i1 %obit169}170 171; We may be able to use LLILH instead of LLILF.172define zeroext i1 @f11(i64 %dummy, i64 %a, ptr %res) {173; CHECK-LABEL: f11:174; CHECK: llilh [[REG1:%r[0-9]+]], 32769175; CHECK: sgr %r3, [[REG1]]176; CHECK-DAG: stg %r3, 0(%r4)177; CHECK-DAG: ipm [[REG:%r[0-5]]]178; CHECK-DAG: afi [[REG]], 1342177280179; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33180; CHECK: br %r14181 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 -2147549184)182 %val = extractvalue {i64, i1} %t, 0183 %obit = extractvalue {i64, i1} %t, 1184 store i64 %val, ptr %res185 ret i1 %obit186}187 188; Check low end of the LLILF/SGR range.189define zeroext i1 @f12(i64 %dummy, i64 %a, ptr %res) {190; CHECK-LABEL: f12:191; CHECK: llilf [[REG1:%r[0-9]+]], 4294967295192; CHECK: sgr %r3, [[REG1]]193; CHECK-DAG: stg %r3, 0(%r4)194; CHECK-DAG: ipm [[REG:%r[0-5]]]195; CHECK-DAG: afi [[REG]], 1342177280196; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33197; CHECK: br %r14198 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 -4294967295)199 %val = extractvalue {i64, i1} %t, 0200 %obit = extractvalue {i64, i1} %t, 1201 store i64 %val, ptr %res202 ret i1 %obit203}204 205; Check the next value down, which must use register addition instead.206define zeroext i1 @f13(i64 %dummy, i64 %a, ptr %res) {207; CHECK-LABEL: f13:208; CHECK: llihf [[REG1:%r[0-9]+]], 4294967295209; CHECK: agr [[REG1]], %r3210; CHECK-DAG: stg [[REG1]], 0(%r4)211; CHECK-DAG: ipm [[REG:%r[0-5]]]212; CHECK-DAG: afi [[REG]], 1342177280213; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33214; CHECK: br %r14215 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 -4294967296)216 %val = extractvalue {i64, i1} %t, 0217 %obit = extractvalue {i64, i1} %t, 1218 store i64 %val, ptr %res219 ret i1 %obit220}221 222; Check using the overflow result for a branch.223define void @f14(i64 %dummy, i64 %a, ptr %res) {224; CHECK-LABEL: f14:225; CHECK: aghi %r3, 1226; CHECK: stg %r3, 0(%r4)227; CHECK: {{jgo foo@PLT|bnor %r14}}228; CHECK: {{br %r14|jg foo@PLT}}229 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 1)230 %val = extractvalue {i64, i1} %t, 0231 %obit = extractvalue {i64, i1} %t, 1232 store i64 %val, ptr %res233 br i1 %obit, label %call, label %exit234 235call:236 tail call i32 @foo()237 br label %exit238 239exit:240 ret void241}242 243; ... and the same with the inverted direction.244define void @f15(i64 %dummy, i64 %a, ptr %res) {245; CHECK-LABEL: f15:246; CHECK: aghi %r3, 1247; CHECK: stg %r3, 0(%r4)248; CHECK: {{jgno foo@PLT|bor %r14}}249; CHECK: {{br %r14|jg foo@PLT}}250 %t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 1)251 %val = extractvalue {i64, i1} %t, 0252 %obit = extractvalue {i64, i1} %t, 1253 store i64 %val, ptr %res254 br i1 %obit, label %exit, label %call255 256call:257 tail call i32 @foo()258 br label %exit259 260exit:261 ret void262}263 264declare {i64, i1} @llvm.sadd.with.overflow.i64(i64, i64) nounwind readnone265 266