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1; Test 32-bit subtraction in which the second operand is constant.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s5 6declare i32 @foo()7 8; Check subtractions of 1.9define zeroext i1 @f1(i32 %dummy, i32 %a, ptr %res) {10; CHECK-LABEL: f1:11; CHECK: ahi %r3, -112; CHECK-DAG: st %r3, 0(%r4)13; CHECK-DAG: ipm [[REG:%r[0-5]]]14; CHECK-DAG: afi [[REG]], 134217728015; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 3316; CHECK: br %r1417 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 1)18 %val = extractvalue {i32, i1} %t, 019 %obit = extractvalue {i32, i1} %t, 120 store i32 %val, ptr %res21 ret i1 %obit22}23 24; Check the high end of the AHI range.25define zeroext i1 @f2(i32 %dummy, i32 %a, ptr %res) {26; CHECK-LABEL: f2:27; CHECK: ahi %r3, -3276828; CHECK-DAG: st %r3, 0(%r4)29; CHECK-DAG: ipm [[REG:%r[0-5]]]30; CHECK-DAG: afi [[REG]], 134217728031; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 3332; CHECK: br %r1433 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 32768)34 %val = extractvalue {i32, i1} %t, 035 %obit = extractvalue {i32, i1} %t, 136 store i32 %val, ptr %res37 ret i1 %obit38}39 40; Check the next value up, which must use AFI instead.41define zeroext i1 @f3(i32 %dummy, i32 %a, ptr %res) {42; CHECK-LABEL: f3:43; CHECK: afi %r3, -3276944; CHECK-DAG: st %r3, 0(%r4)45; CHECK-DAG: ipm [[REG:%r[0-5]]]46; CHECK-DAG: afi [[REG]], 134217728047; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 3348; CHECK: br %r1449 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 32769)50 %val = extractvalue {i32, i1} %t, 051 %obit = extractvalue {i32, i1} %t, 152 store i32 %val, ptr %res53 ret i1 %obit54}55 56; Check the high end of the signed 32-bit range.57define zeroext i1 @f4(i32 %dummy, i32 %a, ptr %res) {58; CHECK-LABEL: f4:59; CHECK: afi %r3, -214748364760; CHECK-DAG: st %r3, 0(%r4)61; CHECK-DAG: ipm [[REG:%r[0-5]]]62; CHECK-DAG: afi [[REG]], 134217728063; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 3364; CHECK: br %r1465 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 2147483647)66 %val = extractvalue {i32, i1} %t, 067 %obit = extractvalue {i32, i1} %t, 168 store i32 %val, ptr %res69 ret i1 %obit70}71 72; Check the next value up, which is treated as a negative value73; and must use a register.74define zeroext i1 @f5(i32 %dummy, i32 %a, ptr %res) {75; CHECK-LABEL: f5:76; CHECK: llilh [[REG1:%r[0-5]]], 3276877; CHECK: sr %r3, [[REG1]]78; CHECK-DAG: st %r3, 0(%r4)79; CHECK-DAG: ipm [[REG:%r[0-5]]]80; CHECK-DAG: afi [[REG]], 134217728081; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 3382; CHECK: br %r1483 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 2147483648)84 %val = extractvalue {i32, i1} %t, 085 %obit = extractvalue {i32, i1} %t, 186 store i32 %val, ptr %res87 ret i1 %obit88}89 90; Check the next value up, which is treated as a negative value,91; and can use AFI again.92define zeroext i1 @f6(i32 %dummy, i32 %a, ptr %res) {93; CHECK-LABEL: f6:94; CHECK: afi %r3, 214748364795; CHECK-DAG: st %r3, 0(%r4)96; CHECK-DAG: ipm [[REG:%r[0-5]]]97; CHECK-DAG: afi [[REG]], 134217728098; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 3399; CHECK: br %r14100 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 2147483649)101 %val = extractvalue {i32, i1} %t, 0102 %obit = extractvalue {i32, i1} %t, 1103 store i32 %val, ptr %res104 ret i1 %obit105}106 107; Check the high end of the negative AHI range.108define zeroext i1 @f7(i32 %dummy, i32 %a, ptr %res) {109; CHECK-LABEL: f7:110; CHECK: ahi %r3, 1111; CHECK-DAG: st %r3, 0(%r4)112; CHECK-DAG: ipm [[REG:%r[0-5]]]113; CHECK-DAG: afi [[REG]], 1342177280114; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33115; CHECK: br %r14116 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 -1)117 %val = extractvalue {i32, i1} %t, 0118 %obit = extractvalue {i32, i1} %t, 1119 store i32 %val, ptr %res120 ret i1 %obit121}122 123; Check the low end of the AHI range.124define zeroext i1 @f8(i32 %dummy, i32 %a, ptr %res) {125; CHECK-LABEL: f8:126; CHECK: ahi %r3, 32767127; CHECK-DAG: st %r3, 0(%r4)128; CHECK-DAG: ipm [[REG:%r[0-5]]]129; CHECK-DAG: afi [[REG]], 1342177280130; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33131; CHECK: br %r14132 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 -32767)133 %val = extractvalue {i32, i1} %t, 0134 %obit = extractvalue {i32, i1} %t, 1135 store i32 %val, ptr %res136 ret i1 %obit137}138 139; Check the next value down, which must use AFI instead.140define zeroext i1 @f9(i32 %dummy, i32 %a, ptr %res) {141; CHECK-LABEL: f9:142; CHECK: afi %r3, 32768143; CHECK-DAG: st %r3, 0(%r4)144; CHECK-DAG: ipm [[REG:%r[0-5]]]145; CHECK-DAG: afi [[REG]], 1342177280146; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33147; CHECK: br %r14148 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 -32768)149 %val = extractvalue {i32, i1} %t, 0150 %obit = extractvalue {i32, i1} %t, 1151 store i32 %val, ptr %res152 ret i1 %obit153}154 155; Check the low end of the signed 32-bit range.156define zeroext i1 @f10(i32 %dummy, i32 %a, ptr %res) {157; CHECK-LABEL: f10:158; CHECK: afi %r3, 2147483647159; CHECK-DAG: st %r3, 0(%r4)160; CHECK-DAG: ipm [[REG:%r[0-5]]]161; CHECK-DAG: afi [[REG]], 1342177280162; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33163; CHECK: br %r14164 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 -2147483647)165 %val = extractvalue {i32, i1} %t, 0166 %obit = extractvalue {i32, i1} %t, 1167 store i32 %val, ptr %res168 ret i1 %obit169}170 171; Check the next value down, which must use a register.172define zeroext i1 @f11(i32 %dummy, i32 %a, ptr %res) {173; CHECK-LABEL: f11:174; CHECK: llilh [[REG1:%r[0-5]]], 32768175; CHECK: sr %r3, [[REG1]]176; CHECK-DAG: st %r3, 0(%r4)177; CHECK-DAG: ipm [[REG:%r[0-5]]]178; CHECK-DAG: afi [[REG]], 1342177280179; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33180; CHECK: br %r14181 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 -2147483648)182 %val = extractvalue {i32, i1} %t, 0183 %obit = extractvalue {i32, i1} %t, 1184 store i32 %val, ptr %res185 ret i1 %obit186}187 188; Check the next value down, which is treated as a positive value.189define zeroext i1 @f12(i32 %dummy, i32 %a, ptr %res) {190; CHECK-LABEL: f12:191; CHECK: afi %r3, -2147483647192; CHECK-DAG: st %r3, 0(%r4)193; CHECK-DAG: ipm [[REG:%r[0-5]]]194; CHECK-DAG: afi [[REG]], 1342177280195; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33196; CHECK: br %r14197 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 -2147483649)198 %val = extractvalue {i32, i1} %t, 0199 %obit = extractvalue {i32, i1} %t, 1200 store i32 %val, ptr %res201 ret i1 %obit202}203 204; Check using the overflow result for a branch.205define void @f13(i32 %dummy, i32 %a, ptr %res) {206; CHECK-LABEL: f13:207; CHECK: ahi %r3, -1208; CHECK: st %r3, 0(%r4)209; CHECK: {{jgo foo@PLT|bnor %r14}}210; CHECK: {{br %r14|jg foo@PLT}}211 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 1)212 %val = extractvalue {i32, i1} %t, 0213 %obit = extractvalue {i32, i1} %t, 1214 store i32 %val, ptr %res215 br i1 %obit, label %call, label %exit216 217call:218 tail call i32 @foo()219 br label %exit220 221exit:222 ret void223}224 225; ... and the same with the inverted direction.226define void @f14(i32 %dummy, i32 %a, ptr %res) {227; CHECK-LABEL: f14:228; CHECK: ahi %r3, -1229; CHECK: st %r3, 0(%r4)230; CHECK: {{jgno foo@PLT|bor %r14}}231; CHECK: {{br %r14|jg foo@PLT}}232 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 1)233 %val = extractvalue {i32, i1} %t, 0234 %obit = extractvalue {i32, i1} %t, 1235 store i32 %val, ptr %res236 br i1 %obit, label %exit, label %call237 238call:239 tail call i32 @foo()240 br label %exit241 242exit:243 ret void244}245 246 247declare {i32, i1} @llvm.ssub.with.overflow.i32(i32, i32) nounwind readnone248 249