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1; Test 32-bit subtraction.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s5 6declare i32 @foo()7 8; Check SR.9define i32 @f1(i32 %a, i32 %b) {10; CHECK-LABEL: f1:11; CHECK: sr %r2, %r312; CHECK: br %r1413 %sub = sub i32 %a, %b14 ret i32 %sub15}16 17; Check the low end of the S range.18define i32 @f2(i32 %a, ptr %src) {19; CHECK-LABEL: f2:20; CHECK: s %r2, 0(%r3)21; CHECK: br %r1422 %b = load i32, ptr %src23 %sub = sub i32 %a, %b24 ret i32 %sub25}26 27; Check the high end of the aligned S range.28define i32 @f3(i32 %a, ptr %src) {29; CHECK-LABEL: f3:30; CHECK: s %r2, 4092(%r3)31; CHECK: br %r1432 %ptr = getelementptr i32, ptr %src, i64 102333 %b = load i32, ptr %ptr34 %sub = sub i32 %a, %b35 ret i32 %sub36}37 38; Check the next word up, which should use SY instead of S.39define i32 @f4(i32 %a, ptr %src) {40; CHECK-LABEL: f4:41; CHECK: sy %r2, 4096(%r3)42; CHECK: br %r1443 %ptr = getelementptr i32, ptr %src, i64 102444 %b = load i32, ptr %ptr45 %sub = sub i32 %a, %b46 ret i32 %sub47}48 49; Check the high end of the aligned SY range.50define i32 @f5(i32 %a, ptr %src) {51; CHECK-LABEL: f5:52; CHECK: sy %r2, 524284(%r3)53; CHECK: br %r1454 %ptr = getelementptr i32, ptr %src, i64 13107155 %b = load i32, ptr %ptr56 %sub = sub i32 %a, %b57 ret i32 %sub58}59 60; Check the next word up, which needs separate address logic.61; Other sequences besides this one would be OK.62define i32 @f6(i32 %a, ptr %src) {63; CHECK-LABEL: f6:64; CHECK: agfi %r3, 52428865; CHECK: s %r2, 0(%r3)66; CHECK: br %r1467 %ptr = getelementptr i32, ptr %src, i64 13107268 %b = load i32, ptr %ptr69 %sub = sub i32 %a, %b70 ret i32 %sub71}72 73; Check the high end of the negative aligned SY range.74define i32 @f7(i32 %a, ptr %src) {75; CHECK-LABEL: f7:76; CHECK: sy %r2, -4(%r3)77; CHECK: br %r1478 %ptr = getelementptr i32, ptr %src, i64 -179 %b = load i32, ptr %ptr80 %sub = sub i32 %a, %b81 ret i32 %sub82}83 84; Check the low end of the SY range.85define i32 @f8(i32 %a, ptr %src) {86; CHECK-LABEL: f8:87; CHECK: sy %r2, -524288(%r3)88; CHECK: br %r1489 %ptr = getelementptr i32, ptr %src, i64 -13107290 %b = load i32, ptr %ptr91 %sub = sub i32 %a, %b92 ret i32 %sub93}94 95; Check the next word down, which needs separate address logic.96; Other sequences besides this one would be OK.97define i32 @f9(i32 %a, ptr %src) {98; CHECK-LABEL: f9:99; CHECK: agfi %r3, -524292100; CHECK: s %r2, 0(%r3)101; CHECK: br %r14102 %ptr = getelementptr i32, ptr %src, i64 -131073103 %b = load i32, ptr %ptr104 %sub = sub i32 %a, %b105 ret i32 %sub106}107 108; Check that S allows an index.109define i32 @f10(i32 %a, i64 %src, i64 %index) {110; CHECK-LABEL: f10:111; CHECK: s %r2, 4092({{%r4,%r3|%r3,%r4}})112; CHECK: br %r14113 %add1 = add i64 %src, %index114 %add2 = add i64 %add1, 4092115 %ptr = inttoptr i64 %add2 to ptr116 %b = load i32, ptr %ptr117 %sub = sub i32 %a, %b118 ret i32 %sub119}120 121; Check that SY allows an index.122define i32 @f11(i32 %a, i64 %src, i64 %index) {123; CHECK-LABEL: f11:124; CHECK: sy %r2, 4096({{%r4,%r3|%r3,%r4}})125; CHECK: br %r14126 %add1 = add i64 %src, %index127 %add2 = add i64 %add1, 4096128 %ptr = inttoptr i64 %add2 to ptr129 %b = load i32, ptr %ptr130 %sub = sub i32 %a, %b131 ret i32 %sub132}133 134; Check that subtractions of spilled values can use S rather than SR.135define i32 @f12(ptr %ptr0) {136; CHECK-LABEL: f12:137; CHECK: brasl %r14, foo@PLT138; CHECK: s %r2, 16{{[04]}}(%r15)139; CHECK: br %r14140 %ptr1 = getelementptr i32, ptr %ptr0, i64 2141 %ptr2 = getelementptr i32, ptr %ptr0, i64 4142 %ptr3 = getelementptr i32, ptr %ptr0, i64 6143 %ptr4 = getelementptr i32, ptr %ptr0, i64 8144 %ptr5 = getelementptr i32, ptr %ptr0, i64 10145 %ptr6 = getelementptr i32, ptr %ptr0, i64 12146 %ptr7 = getelementptr i32, ptr %ptr0, i64 14147 %ptr8 = getelementptr i32, ptr %ptr0, i64 16148 %ptr9 = getelementptr i32, ptr %ptr0, i64 18149 150 %val0 = load i32, ptr %ptr0151 %val1 = load i32, ptr %ptr1152 %val2 = load i32, ptr %ptr2153 %val3 = load i32, ptr %ptr3154 %val4 = load i32, ptr %ptr4155 %val5 = load i32, ptr %ptr5156 %val6 = load i32, ptr %ptr6157 %val7 = load i32, ptr %ptr7158 %val8 = load i32, ptr %ptr8159 %val9 = load i32, ptr %ptr9160 161 %ret = call i32 @foo()162 163 %sub0 = sub i32 %ret, %val0164 %sub1 = sub i32 %sub0, %val1165 %sub2 = sub i32 %sub1, %val2166 %sub3 = sub i32 %sub2, %val3167 %sub4 = sub i32 %sub3, %val4168 %sub5 = sub i32 %sub4, %val5169 %sub6 = sub i32 %sub5, %val6170 %sub7 = sub i32 %sub6, %val7171 %sub8 = sub i32 %sub7, %val8172 %sub9 = sub i32 %sub8, %val9173 174 ret i32 %sub9175}176