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1; Test 32-bit subtraction in which the second operand is a sign-extended2; i16 memory value.3;4; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s5 6; Check the low end of the SH range.7define i32 @f1(i32 %lhs, ptr %src) {8; CHECK-LABEL: f1:9; CHECK: sh %r2, 0(%r3)10; CHECK: br %r1411 %half = load i16, ptr %src12 %rhs = sext i16 %half to i3213 %res = sub i32 %lhs, %rhs14 ret i32 %res15}16 17; Check the high end of the aligned SH range.18define i32 @f2(i32 %lhs, ptr %src) {19; CHECK-LABEL: f2:20; CHECK: sh %r2, 4094(%r3)21; CHECK: br %r1422 %ptr = getelementptr i16, ptr %src, i64 204723 %half = load i16, ptr %ptr24 %rhs = sext i16 %half to i3225 %res = sub i32 %lhs, %rhs26 ret i32 %res27}28 29; Check the next halfword up, which should use SHY instead of SH.30define i32 @f3(i32 %lhs, ptr %src) {31; CHECK-LABEL: f3:32; CHECK: shy %r2, 4096(%r3)33; CHECK: br %r1434 %ptr = getelementptr i16, ptr %src, i64 204835 %half = load i16, ptr %ptr36 %rhs = sext i16 %half to i3237 %res = sub i32 %lhs, %rhs38 ret i32 %res39}40 41; Check the high end of the aligned SHY range.42define i32 @f4(i32 %lhs, ptr %src) {43; CHECK-LABEL: f4:44; CHECK: shy %r2, 524286(%r3)45; CHECK: br %r1446 %ptr = getelementptr i16, ptr %src, i64 26214347 %half = load i16, ptr %ptr48 %rhs = sext i16 %half to i3249 %res = sub i32 %lhs, %rhs50 ret i32 %res51}52 53; Check the next halfword up, which needs separate address logic.54; Other sequences besides this one would be OK.55define i32 @f5(i32 %lhs, ptr %src) {56; CHECK-LABEL: f5:57; CHECK: agfi %r3, 52428858; CHECK: sh %r2, 0(%r3)59; CHECK: br %r1460 %ptr = getelementptr i16, ptr %src, i64 26214461 %half = load i16, ptr %ptr62 %rhs = sext i16 %half to i3263 %res = sub i32 %lhs, %rhs64 ret i32 %res65}66 67; Check the high end of the negative aligned SHY range.68define i32 @f6(i32 %lhs, ptr %src) {69; CHECK-LABEL: f6:70; CHECK: shy %r2, -2(%r3)71; CHECK: br %r1472 %ptr = getelementptr i16, ptr %src, i64 -173 %half = load i16, ptr %ptr74 %rhs = sext i16 %half to i3275 %res = sub i32 %lhs, %rhs76 ret i32 %res77}78 79; Check the low end of the SHY range.80define i32 @f7(i32 %lhs, ptr %src) {81; CHECK-LABEL: f7:82; CHECK: shy %r2, -524288(%r3)83; CHECK: br %r1484 %ptr = getelementptr i16, ptr %src, i64 -26214485 %half = load i16, ptr %ptr86 %rhs = sext i16 %half to i3287 %res = sub i32 %lhs, %rhs88 ret i32 %res89}90 91; Check the next halfword down, which needs separate address logic.92; Other sequences besides this one would be OK.93define i32 @f8(i32 %lhs, ptr %src) {94; CHECK-LABEL: f8:95; CHECK: agfi %r3, -52429096; CHECK: sh %r2, 0(%r3)97; CHECK: br %r1498 %ptr = getelementptr i16, ptr %src, i64 -26214599 %half = load i16, ptr %ptr100 %rhs = sext i16 %half to i32101 %res = sub i32 %lhs, %rhs102 ret i32 %res103}104 105; Check that SH allows an index.106define i32 @f9(i32 %lhs, i64 %src, i64 %index) {107; CHECK-LABEL: f9:108; CHECK: sh %r2, 4094({{%r4,%r3|%r3,%r4}})109; CHECK: br %r14110 %sub1 = add i64 %src, %index111 %sub2 = add i64 %sub1, 4094112 %ptr = inttoptr i64 %sub2 to ptr113 %half = load i16, ptr %ptr114 %rhs = sext i16 %half to i32115 %res = sub i32 %lhs, %rhs116 ret i32 %res117}118 119; Check that SHY allows an index.120define i32 @f10(i32 %lhs, i64 %src, i64 %index) {121; CHECK-LABEL: f10:122; CHECK: shy %r2, 4096({{%r4,%r3|%r3,%r4}})123; CHECK: br %r14124 %sub1 = add i64 %src, %index125 %sub2 = add i64 %sub1, 4096126 %ptr = inttoptr i64 %sub2 to ptr127 %half = load i16, ptr %ptr128 %rhs = sext i16 %half to i32129 %res = sub i32 %lhs, %rhs130 ret i32 %res131}132