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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 32; Test additions between an i64 and a zero-extended i32.3;4; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s5 6declare i64 @foo()7 8; Check ALGFR.9define zeroext i1 @f1(i64 %dummy, i64 %a, i32 %b, ptr %res) {10; CHECK-LABEL: f1:11; CHECK: # %bb.0:12; CHECK-NEXT: algfr %r3, %r413; CHECK-NEXT: ipm %r014; CHECK-NEXT: risbg %r2, %r0, 63, 191, 3515; CHECK-NEXT: stg %r3, 0(%r5)16; CHECK-NEXT: br %r1417 %bext = zext i32 %b to i6418 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %bext)19 %val = extractvalue {i64, i1} %t, 020 %obit = extractvalue {i64, i1} %t, 121 store i64 %val, ptr %res22 ret i1 %obit23}24 25; Check using the overflow result for a branch.26define void @f2(i64 %dummy, i64 %a, i32 %b, ptr %res) {27; CHECK-LABEL: f2:28; CHECK: # %bb.0:29; CHECK-NEXT: algfr %r3, %r430; CHECK-NEXT: stg %r3, 0(%r5)31; CHECK-NEXT: jgnle foo@PLT32; CHECK-NEXT: .LBB1_1: # %exit33; CHECK-NEXT: br %r1434 %bext = zext i32 %b to i6435 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %bext)36 %val = extractvalue {i64, i1} %t, 037 %obit = extractvalue {i64, i1} %t, 138 store i64 %val, ptr %res39 br i1 %obit, label %call, label %exit40 41call:42 tail call i64 @foo()43 br label %exit44 45exit:46 ret void47}48 49; ... and the same with the inverted direction.50define void @f3(i64 %dummy, i64 %a, i32 %b, ptr %res) {51; CHECK-LABEL: f3:52; CHECK: # %bb.0:53; CHECK-NEXT: algfr %r3, %r454; CHECK-NEXT: stg %r3, 0(%r5)55; CHECK-NEXT: jgle foo@PLT56; CHECK-NEXT: .LBB2_1: # %exit57; CHECK-NEXT: br %r1458 %bext = zext i32 %b to i6459 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %bext)60 %val = extractvalue {i64, i1} %t, 061 %obit = extractvalue {i64, i1} %t, 162 store i64 %val, ptr %res63 br i1 %obit, label %exit, label %call64 65call:66 tail call i64 @foo()67 br label %exit68 69exit:70 ret void71}72 73; Check ALGF with no displacement.74define zeroext i1 @f4(i64 %dummy, i64 %a, ptr %src, ptr %res) {75; CHECK-LABEL: f4:76; CHECK: # %bb.0:77; CHECK-NEXT: algf %r3, 0(%r4)78; CHECK-NEXT: ipm %r079; CHECK-NEXT: risbg %r2, %r0, 63, 191, 3580; CHECK-NEXT: stg %r3, 0(%r5)81; CHECK-NEXT: br %r1482 %b = load i32, ptr %src83 %bext = zext i32 %b to i6484 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %bext)85 %val = extractvalue {i64, i1} %t, 086 %obit = extractvalue {i64, i1} %t, 187 store i64 %val, ptr %res88 ret i1 %obit89}90 91; Check the high end of the aligned ALGF range.92define zeroext i1 @f5(i64 %dummy, i64 %a, ptr %src, ptr %res) {93; CHECK-LABEL: f5:94; CHECK: # %bb.0:95; CHECK-NEXT: algf %r3, 524284(%r4)96; CHECK-NEXT: ipm %r097; CHECK-NEXT: risbg %r2, %r0, 63, 191, 3598; CHECK-NEXT: stg %r3, 0(%r5)99; CHECK-NEXT: br %r14100 %ptr = getelementptr i32, ptr %src, i64 131071101 %b = load i32, ptr %ptr102 %bext = zext i32 %b to i64103 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %bext)104 %val = extractvalue {i64, i1} %t, 0105 %obit = extractvalue {i64, i1} %t, 1106 store i64 %val, ptr %res107 ret i1 %obit108}109 110; Check the next doubleword up, which needs separate address logic.111; Other sequences besides this one would be OK.112define zeroext i1 @f6(i64 %dummy, i64 %a, ptr %src, ptr %res) {113; CHECK-LABEL: f6:114; CHECK: # %bb.0:115; CHECK-NEXT: agfi %r4, 524288116; CHECK-NEXT: algf %r3, 0(%r4)117; CHECK-NEXT: ipm %r0118; CHECK-NEXT: risbg %r2, %r0, 63, 191, 35119; CHECK-NEXT: stg %r3, 0(%r5)120; CHECK-NEXT: br %r14121 %ptr = getelementptr i32, ptr %src, i64 131072122 %b = load i32, ptr %ptr123 %bext = zext i32 %b to i64124 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %bext)125 %val = extractvalue {i64, i1} %t, 0126 %obit = extractvalue {i64, i1} %t, 1127 store i64 %val, ptr %res128 ret i1 %obit129}130 131; Check the high end of the negative aligned ALGF range.132define zeroext i1 @f7(i64 %dummy, i64 %a, ptr %src, ptr %res) {133; CHECK-LABEL: f7:134; CHECK: # %bb.0:135; CHECK-NEXT: algf %r3, -4(%r4)136; CHECK-NEXT: ipm %r0137; CHECK-NEXT: risbg %r2, %r0, 63, 191, 35138; CHECK-NEXT: stg %r3, 0(%r5)139; CHECK-NEXT: br %r14140 %ptr = getelementptr i32, ptr %src, i64 -1141 %b = load i32, ptr %ptr142 %bext = zext i32 %b to i64143 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %bext)144 %val = extractvalue {i64, i1} %t, 0145 %obit = extractvalue {i64, i1} %t, 1146 store i64 %val, ptr %res147 ret i1 %obit148}149 150; Check the low end of the ALGF range.151define zeroext i1 @f8(i64 %dummy, i64 %a, ptr %src, ptr %res) {152; CHECK-LABEL: f8:153; CHECK: # %bb.0:154; CHECK-NEXT: algf %r3, -524288(%r4)155; CHECK-NEXT: ipm %r0156; CHECK-NEXT: risbg %r2, %r0, 63, 191, 35157; CHECK-NEXT: stg %r3, 0(%r5)158; CHECK-NEXT: br %r14159 %ptr = getelementptr i32, ptr %src, i64 -131072160 %b = load i32, ptr %ptr161 %bext = zext i32 %b to i64162 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %bext)163 %val = extractvalue {i64, i1} %t, 0164 %obit = extractvalue {i64, i1} %t, 1165 store i64 %val, ptr %res166 ret i1 %obit167}168 169; Check the next doubleword down, which needs separate address logic.170; Other sequences besides this one would be OK.171define zeroext i1 @f9(i64 %dummy, i64 %a, ptr %src, ptr %res) {172; CHECK-LABEL: f9:173; CHECK: # %bb.0:174; CHECK-NEXT: agfi %r4, -524292175; CHECK-NEXT: algf %r3, 0(%r4)176; CHECK-NEXT: ipm %r0177; CHECK-NEXT: risbg %r2, %r0, 63, 191, 35178; CHECK-NEXT: stg %r3, 0(%r5)179; CHECK-NEXT: br %r14180 %ptr = getelementptr i32, ptr %src, i64 -131073181 %b = load i32, ptr %ptr182 %bext = zext i32 %b to i64183 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %bext)184 %val = extractvalue {i64, i1} %t, 0185 %obit = extractvalue {i64, i1} %t, 1186 store i64 %val, ptr %res187 ret i1 %obit188}189 190; Check that ALGF allows an index.191define zeroext i1 @f10(i64 %src, i64 %index, i64 %a, ptr %res) {192; CHECK-LABEL: f10:193; CHECK: # %bb.0:194; CHECK-NEXT: algf %r4, 524284(%r3,%r2)195; CHECK-NEXT: ipm %r0196; CHECK-NEXT: risbg %r2, %r0, 63, 191, 35197; CHECK-NEXT: stg %r4, 0(%r5)198; CHECK-NEXT: br %r14199 %add1 = add i64 %src, %index200 %add2 = add i64 %add1, 524284201 %ptr = inttoptr i64 %add2 to ptr202 %b = load i32, ptr %ptr203 %bext = zext i32 %b to i64204 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %bext)205 %val = extractvalue {i64, i1} %t, 0206 %obit = extractvalue {i64, i1} %t, 1207 store i64 %val, ptr %res208 ret i1 %obit209}210 211; Check that additions of spilled values can use ALGF rather than ALGFR.212define zeroext i1 @f11(ptr %ptr0) {213; CHECK-LABEL: f11:214; CHECK: # %bb.0:215; CHECK-NEXT: stmg %r6, %r15, 48(%r15)216; CHECK-NEXT: .cfi_offset %r6, -112217; CHECK-NEXT: .cfi_offset %r7, -104218; CHECK-NEXT: .cfi_offset %r8, -96219; CHECK-NEXT: .cfi_offset %r9, -88220; CHECK-NEXT: .cfi_offset %r10, -80221; CHECK-NEXT: .cfi_offset %r11, -72222; CHECK-NEXT: .cfi_offset %r12, -64223; CHECK-NEXT: .cfi_offset %r13, -56224; CHECK-NEXT: .cfi_offset %r14, -48225; CHECK-NEXT: .cfi_offset %r15, -40226; CHECK-NEXT: aghi %r15, -168227; CHECK-NEXT: .cfi_def_cfa_offset 328228; CHECK-NEXT: lhi %r0, 100229; CHECK-NEXT: lhi %r12, 100230; CHECK-NEXT: a %r12, 0(%r2)231; CHECK-NEXT: lhi %r13, 100232; CHECK-NEXT: a %r13, 8(%r2)233; CHECK-NEXT: lhi %r6, 100234; CHECK-NEXT: a %r6, 16(%r2)235; CHECK-NEXT: lhi %r7, 100236; CHECK-NEXT: a %r7, 24(%r2)237; CHECK-NEXT: lhi %r8, 100238; CHECK-NEXT: a %r8, 32(%r2)239; CHECK-NEXT: lhi %r9, 100240; CHECK-NEXT: a %r9, 40(%r2)241; CHECK-NEXT: lhi %r10, 100242; CHECK-NEXT: a %r10, 48(%r2)243; CHECK-NEXT: lhi %r11, 100244; CHECK-NEXT: a %r11, 56(%r2)245; CHECK-NEXT: lhi %r1, 100246; CHECK-NEXT: a %r1, 64(%r2)247; CHECK-NEXT: st %r1, 160(%r15) # 4-byte Spill248; CHECK-NEXT: a %r0, 72(%r2)249; CHECK-NEXT: st %r0, 164(%r15) # 4-byte Spill250; CHECK-NEXT: st %r12, 0(%r2)251; CHECK-NEXT: st %r13, 8(%r2)252; CHECK-NEXT: st %r6, 16(%r2)253; CHECK-NEXT: st %r7, 24(%r2)254; CHECK-NEXT: st %r8, 32(%r2)255; CHECK-NEXT: st %r9, 40(%r2)256; CHECK-NEXT: st %r10, 48(%r2)257; CHECK-NEXT: st %r11, 56(%r2)258; CHECK-NEXT: st %r1, 64(%r2)259; CHECK-NEXT: st %r0, 72(%r2)260; CHECK-NEXT: brasl %r14, foo@PLT261; CHECK-NEXT: algfr %r2, %r12262; CHECK-NEXT: ipm %r0263; CHECK-NEXT: risbg %r0, %r0, 63, 191, 35264; CHECK-NEXT: algfr %r2, %r13265; CHECK-NEXT: ipm %r1266; CHECK-NEXT: rosbg %r0, %r1, 63, 63, 35267; CHECK-NEXT: algfr %r2, %r6268; CHECK-NEXT: ipm %r1269; CHECK-NEXT: rosbg %r0, %r1, 63, 63, 35270; CHECK-NEXT: algfr %r2, %r7271; CHECK-NEXT: ipm %r1272; CHECK-NEXT: rosbg %r0, %r1, 63, 63, 35273; CHECK-NEXT: algfr %r2, %r8274; CHECK-NEXT: ipm %r1275; CHECK-NEXT: rosbg %r0, %r1, 63, 63, 35276; CHECK-NEXT: algfr %r2, %r9277; CHECK-NEXT: ipm %r1278; CHECK-NEXT: rosbg %r0, %r1, 63, 63, 35279; CHECK-NEXT: algfr %r2, %r10280; CHECK-NEXT: ipm %r1281; CHECK-NEXT: rosbg %r0, %r1, 63, 63, 35282; CHECK-NEXT: algfr %r2, %r11283; CHECK-NEXT: ipm %r1284; CHECK-NEXT: rosbg %r0, %r1, 63, 63, 35285; CHECK-NEXT: algf %r2, 160(%r15) # 4-byte Folded Reload286; CHECK-NEXT: ipm %r1287; CHECK-NEXT: rosbg %r0, %r1, 63, 63, 35288; CHECK-NEXT: algf %r2, 164(%r15) # 4-byte Folded Reload289; CHECK-NEXT: ipm %r1290; CHECK-NEXT: rosbg %r0, %r1, 63, 63, 35291; CHECK-NEXT: risbg %r2, %r0, 63, 191, 0292; CHECK-NEXT: lmg %r6, %r15, 216(%r15)293; CHECK-NEXT: br %r14294 %ptr1 = getelementptr i32, ptr %ptr0, i64 2295 %ptr2 = getelementptr i32, ptr %ptr0, i64 4296 %ptr3 = getelementptr i32, ptr %ptr0, i64 6297 %ptr4 = getelementptr i32, ptr %ptr0, i64 8298 %ptr5 = getelementptr i32, ptr %ptr0, i64 10299 %ptr6 = getelementptr i32, ptr %ptr0, i64 12300 %ptr7 = getelementptr i32, ptr %ptr0, i64 14301 %ptr8 = getelementptr i32, ptr %ptr0, i64 16302 %ptr9 = getelementptr i32, ptr %ptr0, i64 18303 304 %val0 = load i32, ptr %ptr0305 %val1 = load i32, ptr %ptr1306 %val2 = load i32, ptr %ptr2307 %val3 = load i32, ptr %ptr3308 %val4 = load i32, ptr %ptr4309 %val5 = load i32, ptr %ptr5310 %val6 = load i32, ptr %ptr6311 %val7 = load i32, ptr %ptr7312 %val8 = load i32, ptr %ptr8313 %val9 = load i32, ptr %ptr9314 315 %frob0 = add i32 %val0, 100316 %frob1 = add i32 %val1, 100317 %frob2 = add i32 %val2, 100318 %frob3 = add i32 %val3, 100319 %frob4 = add i32 %val4, 100320 %frob5 = add i32 %val5, 100321 %frob6 = add i32 %val6, 100322 %frob7 = add i32 %val7, 100323 %frob8 = add i32 %val8, 100324 %frob9 = add i32 %val9, 100325 326 store i32 %frob0, ptr %ptr0327 store i32 %frob1, ptr %ptr1328 store i32 %frob2, ptr %ptr2329 store i32 %frob3, ptr %ptr3330 store i32 %frob4, ptr %ptr4331 store i32 %frob5, ptr %ptr5332 store i32 %frob6, ptr %ptr6333 store i32 %frob7, ptr %ptr7334 store i32 %frob8, ptr %ptr8335 store i32 %frob9, ptr %ptr9336 337 %ret = call i64 @foo()338 339 %ext0 = zext i32 %frob0 to i64340 %ext1 = zext i32 %frob1 to i64341 %ext2 = zext i32 %frob2 to i64342 %ext3 = zext i32 %frob3 to i64343 %ext4 = zext i32 %frob4 to i64344 %ext5 = zext i32 %frob5 to i64345 %ext6 = zext i32 %frob6 to i64346 %ext7 = zext i32 %frob7 to i64347 %ext8 = zext i32 %frob8 to i64348 %ext9 = zext i32 %frob9 to i64349 350 %t0 = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %ret, i64 %ext0)351 %add0 = extractvalue {i64, i1} %t0, 0352 %obit0 = extractvalue {i64, i1} %t0, 1353 %t1 = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %add0, i64 %ext1)354 %add1 = extractvalue {i64, i1} %t1, 0355 %obit1 = extractvalue {i64, i1} %t1, 1356 %res1 = or i1 %obit0, %obit1357 %t2 = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %add1, i64 %ext2)358 %add2 = extractvalue {i64, i1} %t2, 0359 %obit2 = extractvalue {i64, i1} %t2, 1360 %res2 = or i1 %res1, %obit2361 %t3 = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %add2, i64 %ext3)362 %add3 = extractvalue {i64, i1} %t3, 0363 %obit3 = extractvalue {i64, i1} %t3, 1364 %res3 = or i1 %res2, %obit3365 %t4 = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %add3, i64 %ext4)366 %add4 = extractvalue {i64, i1} %t4, 0367 %obit4 = extractvalue {i64, i1} %t4, 1368 %res4 = or i1 %res3, %obit4369 %t5 = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %add4, i64 %ext5)370 %add5 = extractvalue {i64, i1} %t5, 0371 %obit5 = extractvalue {i64, i1} %t5, 1372 %res5 = or i1 %res4, %obit5373 %t6 = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %add5, i64 %ext6)374 %add6 = extractvalue {i64, i1} %t6, 0375 %obit6 = extractvalue {i64, i1} %t6, 1376 %res6 = or i1 %res5, %obit6377 %t7 = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %add6, i64 %ext7)378 %add7 = extractvalue {i64, i1} %t7, 0379 %obit7 = extractvalue {i64, i1} %t7, 1380 %res7 = or i1 %res6, %obit7381 %t8 = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %add7, i64 %ext8)382 %add8 = extractvalue {i64, i1} %t8, 0383 %obit8 = extractvalue {i64, i1} %t8, 1384 %res8 = or i1 %res7, %obit8385 %t9 = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %add8, i64 %ext9)386 %add9 = extractvalue {i64, i1} %t9, 0387 %obit9 = extractvalue {i64, i1} %t9, 1388 %res9 = or i1 %res8, %obit9389 390 ret i1 %res9391}392 393declare {i64, i1} @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone394 395