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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 32; Test the three-operand form of 64-bit addition.3;4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s5 6declare i64 @foo(i64, i64, i64)7 8; Check ALGRK.9define i64 @f1(i64 %dummy, i64 %a, i64 %b, ptr %flag) {10; CHECK-LABEL: f1:11; CHECK:       # %bb.0:12; CHECK-NEXT:    algrk %r2, %r3, %r413; CHECK-NEXT:    ipm %r014; CHECK-NEXT:    risbg %r0, %r0, 63, 191, 3515; CHECK-NEXT:    stg %r0, 0(%r5)16; CHECK-NEXT:    br %r1417  %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %b)18  %val = extractvalue {i64, i1} %t, 019  %obit = extractvalue {i64, i1} %t, 120  %ext = zext i1 %obit to i6421  store i64 %ext, ptr %flag22  ret i64 %val23}24 25; Check using the overflow result for a branch.26define i64 @f2(i64 %dummy, i64 %a, i64 %b) {27; CHECK-LABEL: f2:28; CHECK:       # %bb.0:29; CHECK-NEXT:    algrk %r2, %r3, %r430; CHECK-NEXT:    bler %r1431; CHECK-NEXT:  .LBB1_1: # %call32; CHECK-NEXT:    lghi %r2, 033; CHECK-NEXT:    jg foo@PLT34  %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %b)35  %val = extractvalue {i64, i1} %t, 036  %obit = extractvalue {i64, i1} %t, 137  br i1 %obit, label %call, label %exit38 39call:40  %res = tail call i64 @foo(i64 0, i64 %a, i64 %b)41  ret i64 %res42 43exit:44  ret i64 %val45}46 47; ... and the same with the inverted direction.48define i64 @f3(i64 %dummy, i64 %a, i64 %b) {49; CHECK-LABEL: f3:50; CHECK:       # %bb.0:51; CHECK-NEXT:    algrk %r2, %r3, %r452; CHECK-NEXT:    bnler %r1453; CHECK-NEXT:  .LBB2_1: # %call54; CHECK-NEXT:    lghi %r2, 055; CHECK-NEXT:    jg foo@PLT56  %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %b)57  %val = extractvalue {i64, i1} %t, 058  %obit = extractvalue {i64, i1} %t, 159  br i1 %obit, label %exit, label %call60 61call:62  %res = tail call i64 @foo(i64 0, i64 %a, i64 %b)63  ret i64 %res64 65exit:66  ret i64 %val67}68 69; Check that we can still use ALGR in obvious cases.70define i64 @f4(i64 %a, i64 %b, ptr %flag) {71; CHECK-LABEL: f4:72; CHECK:       # %bb.0:73; CHECK-NEXT:    algr %r2, %r374; CHECK-NEXT:    ipm %r075; CHECK-NEXT:    risbg %r0, %r0, 63, 191, 3576; CHECK-NEXT:    stg %r0, 0(%r4)77; CHECK-NEXT:    br %r1478  %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %b)79  %val = extractvalue {i64, i1} %t, 080  %obit = extractvalue {i64, i1} %t, 181  %ext = zext i1 %obit to i6482  store i64 %ext, ptr %flag83  ret i64 %val84}85 86declare {i64, i1} @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone87 88