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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 32; Test subtraction of a zero-extended i32 from an i64.3;4; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s5 6declare i64 @foo()7 8; Check SLGFR.9define zeroext i1 @f1(i64 %dummy, i64 %a, i32 %b, ptr %res) {10; CHECK-LABEL: f1:11; CHECK:       # %bb.0:12; CHECK-NEXT:    slgfr %r3, %r413; CHECK-NEXT:    ipm %r014; CHECK-NEXT:    afi %r0, -53687091215; CHECK-NEXT:    risbg %r2, %r0, 63, 191, 3316; CHECK-NEXT:    stg %r3, 0(%r5)17; CHECK-NEXT:    br %r1418  %bext = zext i32 %b to i6419  %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %bext)20  %val = extractvalue {i64, i1} %t, 021  %obit = extractvalue {i64, i1} %t, 122  store i64 %val, ptr %res23  ret i1 %obit24}25 26; Check using the overflow result for a branch.27define void @f2(i64 %dummy, i64 %a, i32 %b, ptr %res) {28; CHECK-LABEL: f2:29; CHECK:       # %bb.0:30; CHECK-NEXT:    slgfr %r3, %r431; CHECK-NEXT:    stg %r3, 0(%r5)32; CHECK-NEXT:    jgle foo@PLT33; CHECK-NEXT:  .LBB1_1: # %exit34; CHECK-NEXT:    br %r1435  %bext = zext i32 %b to i6436  %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %bext)37  %val = extractvalue {i64, i1} %t, 038  %obit = extractvalue {i64, i1} %t, 139  store i64 %val, ptr %res40  br i1 %obit, label %call, label %exit41 42call:43  tail call i64 @foo()44  br label %exit45 46exit:47  ret void48}49 50; ... and the same with the inverted direction.51define void @f3(i64 %dummy, i64 %a, i32 %b, ptr %res) {52; CHECK-LABEL: f3:53; CHECK:       # %bb.0:54; CHECK-NEXT:    slgfr %r3, %r455; CHECK-NEXT:    stg %r3, 0(%r5)56; CHECK-NEXT:    jgnle foo@PLT57; CHECK-NEXT:  .LBB2_1: # %exit58; CHECK-NEXT:    br %r1459  %bext = zext i32 %b to i6460  %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %bext)61  %val = extractvalue {i64, i1} %t, 062  %obit = extractvalue {i64, i1} %t, 163  store i64 %val, ptr %res64  br i1 %obit, label %exit, label %call65 66call:67  tail call i64 @foo()68  br label %exit69 70exit:71  ret void72}73 74; Check SLGF with no displacement.75define zeroext i1 @f4(i64 %dummy, i64 %a, ptr %src, ptr %res) {76; CHECK-LABEL: f4:77; CHECK:       # %bb.0:78; CHECK-NEXT:    slgf %r3, 0(%r4)79; CHECK-NEXT:    ipm %r080; CHECK-NEXT:    afi %r0, -53687091281; CHECK-NEXT:    risbg %r2, %r0, 63, 191, 3382; CHECK-NEXT:    stg %r3, 0(%r5)83; CHECK-NEXT:    br %r1484  %b = load i32, ptr %src85  %bext = zext i32 %b to i6486  %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %bext)87  %val = extractvalue {i64, i1} %t, 088  %obit = extractvalue {i64, i1} %t, 189  store i64 %val, ptr %res90  ret i1 %obit91}92 93; Check the high end of the aligned SLGF range.94define zeroext i1 @f5(i64 %dummy, i64 %a, ptr %src, ptr %res) {95; CHECK-LABEL: f5:96; CHECK:       # %bb.0:97; CHECK-NEXT:    slgf %r3, 524284(%r4)98; CHECK-NEXT:    ipm %r099; CHECK-NEXT:    afi %r0, -536870912100; CHECK-NEXT:    risbg %r2, %r0, 63, 191, 33101; CHECK-NEXT:    stg %r3, 0(%r5)102; CHECK-NEXT:    br %r14103  %ptr = getelementptr i32, ptr %src, i64 131071104  %b = load i32, ptr %ptr105  %bext = zext i32 %b to i64106  %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %bext)107  %val = extractvalue {i64, i1} %t, 0108  %obit = extractvalue {i64, i1} %t, 1109  store i64 %val, ptr %res110  ret i1 %obit111}112 113; Check the next doubleword up, which needs separate address logic.114; Other sequences besides this one would be OK.115define zeroext i1 @f6(i64 %dummy, i64 %a, ptr %src, ptr %res) {116; CHECK-LABEL: f6:117; CHECK:       # %bb.0:118; CHECK-NEXT:    agfi %r4, 524288119; CHECK-NEXT:    slgf %r3, 0(%r4)120; CHECK-NEXT:    ipm %r0121; CHECK-NEXT:    afi %r0, -536870912122; CHECK-NEXT:    risbg %r2, %r0, 63, 191, 33123; CHECK-NEXT:    stg %r3, 0(%r5)124; CHECK-NEXT:    br %r14125  %ptr = getelementptr i32, ptr %src, i64 131072126  %b = load i32, ptr %ptr127  %bext = zext i32 %b to i64128  %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %bext)129  %val = extractvalue {i64, i1} %t, 0130  %obit = extractvalue {i64, i1} %t, 1131  store i64 %val, ptr %res132  ret i1 %obit133}134 135; Check the high end of the negative aligned SLGF range.136define zeroext i1 @f7(i64 %dummy, i64 %a, ptr %src, ptr %res) {137; CHECK-LABEL: f7:138; CHECK:       # %bb.0:139; CHECK-NEXT:    slgf %r3, -4(%r4)140; CHECK-NEXT:    ipm %r0141; CHECK-NEXT:    afi %r0, -536870912142; CHECK-NEXT:    risbg %r2, %r0, 63, 191, 33143; CHECK-NEXT:    stg %r3, 0(%r5)144; CHECK-NEXT:    br %r14145  %ptr = getelementptr i32, ptr %src, i64 -1146  %b = load i32, ptr %ptr147  %bext = zext i32 %b to i64148  %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %bext)149  %val = extractvalue {i64, i1} %t, 0150  %obit = extractvalue {i64, i1} %t, 1151  store i64 %val, ptr %res152  ret i1 %obit153}154 155; Check the low end of the SLGF range.156define zeroext i1 @f8(i64 %dummy, i64 %a, ptr %src, ptr %res) {157; CHECK-LABEL: f8:158; CHECK:       # %bb.0:159; CHECK-NEXT:    slgf %r3, -524288(%r4)160; CHECK-NEXT:    ipm %r0161; CHECK-NEXT:    afi %r0, -536870912162; CHECK-NEXT:    risbg %r2, %r0, 63, 191, 33163; CHECK-NEXT:    stg %r3, 0(%r5)164; CHECK-NEXT:    br %r14165  %ptr = getelementptr i32, ptr %src, i64 -131072166  %b = load i32, ptr %ptr167  %bext = zext i32 %b to i64168  %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %bext)169  %val = extractvalue {i64, i1} %t, 0170  %obit = extractvalue {i64, i1} %t, 1171  store i64 %val, ptr %res172  ret i1 %obit173}174 175; Check the next doubleword down, which needs separate address logic.176; Other sequences besides this one would be OK.177define zeroext i1 @f9(i64 %dummy, i64 %a, ptr %src, ptr %res) {178; CHECK-LABEL: f9:179; CHECK:       # %bb.0:180; CHECK-NEXT:    agfi %r4, -524292181; CHECK-NEXT:    slgf %r3, 0(%r4)182; CHECK-NEXT:    ipm %r0183; CHECK-NEXT:    afi %r0, -536870912184; CHECK-NEXT:    risbg %r2, %r0, 63, 191, 33185; CHECK-NEXT:    stg %r3, 0(%r5)186; CHECK-NEXT:    br %r14187  %ptr = getelementptr i32, ptr %src, i64 -131073188  %b = load i32, ptr %ptr189  %bext = zext i32 %b to i64190  %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %bext)191  %val = extractvalue {i64, i1} %t, 0192  %obit = extractvalue {i64, i1} %t, 1193  store i64 %val, ptr %res194  ret i1 %obit195}196 197; Check that SLGF allows an index.198define zeroext i1 @f10(i64 %src, i64 %index, i64 %a, ptr %res) {199; CHECK-LABEL: f10:200; CHECK:       # %bb.0:201; CHECK-NEXT:    slgf %r4, 524284(%r3,%r2)202; CHECK-NEXT:    ipm %r0203; CHECK-NEXT:    afi %r0, -536870912204; CHECK-NEXT:    risbg %r2, %r0, 63, 191, 33205; CHECK-NEXT:    stg %r4, 0(%r5)206; CHECK-NEXT:    br %r14207  %add1 = add i64 %src, %index208  %add2 = add i64 %add1, 524284209  %ptr = inttoptr i64 %add2 to ptr210  %b = load i32, ptr %ptr211  %bext = zext i32 %b to i64212  %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %bext)213  %val = extractvalue {i64, i1} %t, 0214  %obit = extractvalue {i64, i1} %t, 1215  store i64 %val, ptr %res216  ret i1 %obit217}218 219; Check that subtractions of spilled values can use SLGF rather than SLGFR.220define zeroext i1 @f11(ptr %ptr0) {221; CHECK-LABEL: f11:222; CHECK:       # %bb.0:223; CHECK-NEXT:    stmg %r6, %r15, 48(%r15)224; CHECK-NEXT:    .cfi_offset %r6, -112225; CHECK-NEXT:    .cfi_offset %r7, -104226; CHECK-NEXT:    .cfi_offset %r8, -96227; CHECK-NEXT:    .cfi_offset %r9, -88228; CHECK-NEXT:    .cfi_offset %r10, -80229; CHECK-NEXT:    .cfi_offset %r11, -72230; CHECK-NEXT:    .cfi_offset %r12, -64231; CHECK-NEXT:    .cfi_offset %r13, -56232; CHECK-NEXT:    .cfi_offset %r14, -48233; CHECK-NEXT:    .cfi_offset %r15, -40234; CHECK-NEXT:    aghi %r15, -168235; CHECK-NEXT:    .cfi_def_cfa_offset 328236; CHECK-NEXT:    lhi %r0, 100237; CHECK-NEXT:    lhi %r12, 100238; CHECK-NEXT:    a %r12, 0(%r2)239; CHECK-NEXT:    lhi %r13, 100240; CHECK-NEXT:    a %r13, 8(%r2)241; CHECK-NEXT:    lhi %r6, 100242; CHECK-NEXT:    a %r6, 16(%r2)243; CHECK-NEXT:    lhi %r7, 100244; CHECK-NEXT:    a %r7, 24(%r2)245; CHECK-NEXT:    lhi %r8, 100246; CHECK-NEXT:    a %r8, 32(%r2)247; CHECK-NEXT:    lhi %r9, 100248; CHECK-NEXT:    a %r9, 40(%r2)249; CHECK-NEXT:    lhi %r10, 100250; CHECK-NEXT:    a %r10, 48(%r2)251; CHECK-NEXT:    lhi %r11, 100252; CHECK-NEXT:    a %r11, 56(%r2)253; CHECK-NEXT:    lhi %r1, 100254; CHECK-NEXT:    a %r1, 64(%r2)255; CHECK-NEXT:    st %r1, 160(%r15) # 4-byte Spill256; CHECK-NEXT:    a %r0, 72(%r2)257; CHECK-NEXT:    st %r0, 164(%r15) # 4-byte Spill258; CHECK-NEXT:    st %r12, 0(%r2)259; CHECK-NEXT:    st %r13, 8(%r2)260; CHECK-NEXT:    st %r6, 16(%r2)261; CHECK-NEXT:    st %r7, 24(%r2)262; CHECK-NEXT:    st %r8, 32(%r2)263; CHECK-NEXT:    st %r9, 40(%r2)264; CHECK-NEXT:    st %r10, 48(%r2)265; CHECK-NEXT:    st %r11, 56(%r2)266; CHECK-NEXT:    st %r1, 64(%r2)267; CHECK-NEXT:    st %r0, 72(%r2)268; CHECK-NEXT:    brasl %r14, foo@PLT269; CHECK-NEXT:    slgfr %r2, %r12270; CHECK-NEXT:    ipm %r0271; CHECK-NEXT:    afi %r0, -536870912272; CHECK-NEXT:    srl %r0, 31273; CHECK-NEXT:    slgfr %r2, %r13274; CHECK-NEXT:    ipm %r1275; CHECK-NEXT:    afi %r1, -536870912276; CHECK-NEXT:    rosbg %r0, %r1, 63, 63, 33277; CHECK-NEXT:    slgfr %r2, %r6278; CHECK-NEXT:    ipm %r1279; CHECK-NEXT:    afi %r1, -536870912280; CHECK-NEXT:    rosbg %r0, %r1, 63, 63, 33281; CHECK-NEXT:    slgfr %r2, %r7282; CHECK-NEXT:    ipm %r1283; CHECK-NEXT:    afi %r1, -536870912284; CHECK-NEXT:    rosbg %r0, %r1, 63, 63, 33285; CHECK-NEXT:    slgfr %r2, %r8286; CHECK-NEXT:    ipm %r1287; CHECK-NEXT:    afi %r1, -536870912288; CHECK-NEXT:    rosbg %r0, %r1, 63, 63, 33289; CHECK-NEXT:    slgfr %r2, %r9290; CHECK-NEXT:    ipm %r1291; CHECK-NEXT:    afi %r1, -536870912292; CHECK-NEXT:    rosbg %r0, %r1, 63, 63, 33293; CHECK-NEXT:    slgfr %r2, %r10294; CHECK-NEXT:    ipm %r1295; CHECK-NEXT:    afi %r1, -536870912296; CHECK-NEXT:    rosbg %r0, %r1, 63, 63, 33297; CHECK-NEXT:    slgfr %r2, %r11298; CHECK-NEXT:    ipm %r1299; CHECK-NEXT:    afi %r1, -536870912300; CHECK-NEXT:    rosbg %r0, %r1, 63, 63, 33301; CHECK-NEXT:    slgf %r2, 160(%r15) # 4-byte Folded Reload302; CHECK-NEXT:    ipm %r1303; CHECK-NEXT:    afi %r1, -536870912304; CHECK-NEXT:    rosbg %r0, %r1, 63, 63, 33305; CHECK-NEXT:    slgf %r2, 164(%r15) # 4-byte Folded Reload306; CHECK-NEXT:    ipm %r1307; CHECK-NEXT:    afi %r1, -536870912308; CHECK-NEXT:    rosbg %r0, %r1, 63, 63, 33309; CHECK-NEXT:    risbg %r2, %r0, 63, 191, 0310; CHECK-NEXT:    lmg %r6, %r15, 216(%r15)311; CHECK-NEXT:    br %r14312  %ptr1 = getelementptr i32, ptr %ptr0, i64 2313  %ptr2 = getelementptr i32, ptr %ptr0, i64 4314  %ptr3 = getelementptr i32, ptr %ptr0, i64 6315  %ptr4 = getelementptr i32, ptr %ptr0, i64 8316  %ptr5 = getelementptr i32, ptr %ptr0, i64 10317  %ptr6 = getelementptr i32, ptr %ptr0, i64 12318  %ptr7 = getelementptr i32, ptr %ptr0, i64 14319  %ptr8 = getelementptr i32, ptr %ptr0, i64 16320  %ptr9 = getelementptr i32, ptr %ptr0, i64 18321 322  %val0 = load i32, ptr %ptr0323  %val1 = load i32, ptr %ptr1324  %val2 = load i32, ptr %ptr2325  %val3 = load i32, ptr %ptr3326  %val4 = load i32, ptr %ptr4327  %val5 = load i32, ptr %ptr5328  %val6 = load i32, ptr %ptr6329  %val7 = load i32, ptr %ptr7330  %val8 = load i32, ptr %ptr8331  %val9 = load i32, ptr %ptr9332 333  %frob0 = add i32 %val0, 100334  %frob1 = add i32 %val1, 100335  %frob2 = add i32 %val2, 100336  %frob3 = add i32 %val3, 100337  %frob4 = add i32 %val4, 100338  %frob5 = add i32 %val5, 100339  %frob6 = add i32 %val6, 100340  %frob7 = add i32 %val7, 100341  %frob8 = add i32 %val8, 100342  %frob9 = add i32 %val9, 100343 344  store i32 %frob0, ptr %ptr0345  store i32 %frob1, ptr %ptr1346  store i32 %frob2, ptr %ptr2347  store i32 %frob3, ptr %ptr3348  store i32 %frob4, ptr %ptr4349  store i32 %frob5, ptr %ptr5350  store i32 %frob6, ptr %ptr6351  store i32 %frob7, ptr %ptr7352  store i32 %frob8, ptr %ptr8353  store i32 %frob9, ptr %ptr9354 355  %ret = call i64 @foo()356 357  %ext0 = zext i32 %frob0 to i64358  %ext1 = zext i32 %frob1 to i64359  %ext2 = zext i32 %frob2 to i64360  %ext3 = zext i32 %frob3 to i64361  %ext4 = zext i32 %frob4 to i64362  %ext5 = zext i32 %frob5 to i64363  %ext6 = zext i32 %frob6 to i64364  %ext7 = zext i32 %frob7 to i64365  %ext8 = zext i32 %frob8 to i64366  %ext9 = zext i32 %frob9 to i64367 368  %t0 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %ret, i64 %ext0)369  %add0 = extractvalue {i64, i1} %t0, 0370  %obit0 = extractvalue {i64, i1} %t0, 1371  %t1 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %add0, i64 %ext1)372  %add1 = extractvalue {i64, i1} %t1, 0373  %obit1 = extractvalue {i64, i1} %t1, 1374  %res1 = or i1 %obit0, %obit1375  %t2 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %add1, i64 %ext2)376  %add2 = extractvalue {i64, i1} %t2, 0377  %obit2 = extractvalue {i64, i1} %t2, 1378  %res2 = or i1 %res1, %obit2379  %t3 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %add2, i64 %ext3)380  %add3 = extractvalue {i64, i1} %t3, 0381  %obit3 = extractvalue {i64, i1} %t3, 1382  %res3 = or i1 %res2, %obit3383  %t4 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %add3, i64 %ext4)384  %add4 = extractvalue {i64, i1} %t4, 0385  %obit4 = extractvalue {i64, i1} %t4, 1386  %res4 = or i1 %res3, %obit4387  %t5 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %add4, i64 %ext5)388  %add5 = extractvalue {i64, i1} %t5, 0389  %obit5 = extractvalue {i64, i1} %t5, 1390  %res5 = or i1 %res4, %obit5391  %t6 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %add5, i64 %ext6)392  %add6 = extractvalue {i64, i1} %t6, 0393  %obit6 = extractvalue {i64, i1} %t6, 1394  %res6 = or i1 %res5, %obit6395  %t7 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %add6, i64 %ext7)396  %add7 = extractvalue {i64, i1} %t7, 0397  %obit7 = extractvalue {i64, i1} %t7, 1398  %res7 = or i1 %res6, %obit7399  %t8 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %add7, i64 %ext8)400  %add8 = extractvalue {i64, i1} %t8, 0401  %obit8 = extractvalue {i64, i1} %t8, 1402  %res8 = or i1 %res7, %obit8403  %t9 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %add8, i64 %ext9)404  %add9 = extractvalue {i64, i1} %t9, 0405  %obit9 = extractvalue {i64, i1} %t9, 1406  %res9 = or i1 %res8, %obit9407 408  ret i1 %res9409}410 411declare {i64, i1} @llvm.usub.with.overflow.i64(i64, i64) nounwind readnone412 413