360 lines · plain
1; Test 64-bit subtractions of constants from memory.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s4 5declare i64 @foo()6 7; Check subtraction of 1.8define zeroext i1 @f1(ptr %ptr) {9; CHECK-LABEL: f1:10; CHECK: algsi 0(%r2), -111; CHECK: ipm [[REG:%r[0-5]]]12; CHECK: afi [[REG]], -53687091213; CHECK: risbg %r2, [[REG]], 63, 191, 3314; CHECK: br %r1415 %a = load i64, ptr %ptr16 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)17 %val = extractvalue {i64, i1} %t, 018 %obit = extractvalue {i64, i1} %t, 119 store i64 %val, ptr %ptr20 ret i1 %obit21}22 23; Check the high end of the constant range.24define zeroext i1 @f2(ptr %ptr) {25; CHECK-LABEL: f2:26; CHECK: algsi 0(%r2), -12827; CHECK: ipm [[REG:%r[0-5]]]28; CHECK: afi [[REG]], -53687091229; CHECK: risbg %r2, [[REG]], 63, 191, 3330; CHECK: br %r1431 %a = load i64, ptr %ptr32 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 128)33 %val = extractvalue {i64, i1} %t, 034 %obit = extractvalue {i64, i1} %t, 135 store i64 %val, ptr %ptr36 ret i1 %obit37}38 39; Check the next constant up, which must use an addition and a store.40define zeroext i1 @f3(i64 %dummy, ptr %ptr) {41; CHECK-LABEL: f3:42; CHECK: lg [[VAL:%r[0-5]]], 0(%r3)43; CHECK: slgfi [[VAL]], 12944; CHECK-DAG: stg [[VAL]], 0(%r3)45; CHECK-DAG: ipm [[REG:%r[0-5]]]46; CHECK-DAG: afi [[REG]], -53687091247; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 3348; CHECK: br %r1449 %a = load i64, ptr %ptr50 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 129)51 %val = extractvalue {i64, i1} %t, 052 %obit = extractvalue {i64, i1} %t, 153 store i64 %val, ptr %ptr54 ret i1 %obit55}56 57; Check the low end of the constant range.58define zeroext i1 @f4(ptr %ptr) {59; CHECK-LABEL: f4:60; CHECK: algsi 0(%r2), 12761; CHECK: ipm [[REG:%r[0-5]]]62; CHECK: afi [[REG]], -53687091263; CHECK: risbg %r2, [[REG]], 63, 191, 3364; CHECK: br %r1465 %a = load i64, ptr %ptr66 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 -127)67 %val = extractvalue {i64, i1} %t, 068 %obit = extractvalue {i64, i1} %t, 169 store i64 %val, ptr %ptr70 ret i1 %obit71}72 73; Check the next value down, with the same comment as f3.74define zeroext i1 @f5(i64 %dummy, ptr %ptr) {75; CHECK-LABEL: f5:76; CHECK: lg [[VAL1:%r[0-5]]], 0(%r3)77; CHECK: lghi [[VAL2:%r[0-9]+]], -12878; CHECK: slgr [[VAL1]], [[VAL2]]79; CHECK-DAG: stg [[VAL1]], 0(%r3)80; CHECK-DAG: ipm [[REG:%r[0-5]]]81; CHECK-DAG: afi [[REG]], -53687091282; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 3383; CHECK: br %r1484 %a = load i64, ptr %ptr85 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 -128)86 %val = extractvalue {i64, i1} %t, 087 %obit = extractvalue {i64, i1} %t, 188 store i64 %val, ptr %ptr89 ret i1 %obit90}91 92; Check the high end of the aligned ALGSI range.93define zeroext i1 @f6(ptr %base) {94; CHECK-LABEL: f6:95; CHECK: algsi 524280(%r2), -196; CHECK: ipm [[REG:%r[0-5]]]97; CHECK: afi [[REG]], -53687091298; CHECK: risbg %r2, [[REG]], 63, 191, 3399; CHECK: br %r14100 %ptr = getelementptr i64, ptr %base, i64 65535101 %a = load i64, ptr %ptr102 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)103 %val = extractvalue {i64, i1} %t, 0104 %obit = extractvalue {i64, i1} %t, 1105 store i64 %val, ptr %ptr106 ret i1 %obit107}108 109; Check the next word up, which must use separate address logic.110; Other sequences besides this one would be OK.111define zeroext i1 @f7(ptr %base) {112; CHECK-LABEL: f7:113; CHECK: agfi %r2, 524288114; CHECK: algsi 0(%r2), -1115; CHECK: ipm [[REG:%r[0-5]]]116; CHECK: afi [[REG]], -536870912117; CHECK: risbg %r2, [[REG]], 63, 191, 33118; CHECK: br %r14119 %ptr = getelementptr i64, ptr %base, i64 65536120 %a = load i64, ptr %ptr121 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)122 %val = extractvalue {i64, i1} %t, 0123 %obit = extractvalue {i64, i1} %t, 1124 store i64 %val, ptr %ptr125 ret i1 %obit126}127 128; Check the low end of the ALGSI range.129define zeroext i1 @f8(ptr %base) {130; CHECK-LABEL: f8:131; CHECK: algsi -524288(%r2), -1132; CHECK: ipm [[REG:%r[0-5]]]133; CHECK: afi [[REG]], -536870912134; CHECK: risbg %r2, [[REG]], 63, 191, 33135; CHECK: br %r14136 %ptr = getelementptr i64, ptr %base, i64 -65536137 %a = load i64, ptr %ptr138 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)139 %val = extractvalue {i64, i1} %t, 0140 %obit = extractvalue {i64, i1} %t, 1141 store i64 %val, ptr %ptr142 ret i1 %obit143}144 145; Check the next word down, which must use separate address logic.146; Other sequences besides this one would be OK.147define zeroext i1 @f9(ptr %base) {148; CHECK-LABEL: f9:149; CHECK: agfi %r2, -524296150; CHECK: algsi 0(%r2), -1151; CHECK: ipm [[REG:%r[0-5]]]152; CHECK: afi [[REG]], -536870912153; CHECK: risbg %r2, [[REG]], 63, 191, 33154; CHECK: br %r14155 %ptr = getelementptr i64, ptr %base, i64 -65537156 %a = load i64, ptr %ptr157 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)158 %val = extractvalue {i64, i1} %t, 0159 %obit = extractvalue {i64, i1} %t, 1160 store i64 %val, ptr %ptr161 ret i1 %obit162}163 164; Check that ALGSI does not allow indices.165define zeroext i1 @f10(i64 %base, i64 %index) {166; CHECK-LABEL: f10:167; CHECK: agr %r2, %r3168; CHECK: algsi 8(%r2), -1169; CHECK: ipm [[REG:%r[0-5]]]170; CHECK: afi [[REG]], -536870912171; CHECK: risbg %r2, [[REG]], 63, 191, 33172; CHECK: br %r14173 %add1 = add i64 %base, %index174 %add2 = add i64 %add1, 8175 %ptr = inttoptr i64 %add2 to ptr176 %a = load i64, ptr %ptr177 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)178 %val = extractvalue {i64, i1} %t, 0179 %obit = extractvalue {i64, i1} %t, 1180 store i64 %val, ptr %ptr181 ret i1 %obit182}183 184; Check that subtracting 128 from a spilled value can use ALGSI.185define zeroext i1 @f11(ptr %ptr, i64 %sel) {186; CHECK-LABEL: f11:187; CHECK: algsi {{[0-9]+}}(%r15), -128188; CHECK: br %r14189entry:190 %val0 = load volatile i64, ptr %ptr191 %val1 = load volatile i64, ptr %ptr192 %val2 = load volatile i64, ptr %ptr193 %val3 = load volatile i64, ptr %ptr194 %val4 = load volatile i64, ptr %ptr195 %val5 = load volatile i64, ptr %ptr196 %val6 = load volatile i64, ptr %ptr197 %val7 = load volatile i64, ptr %ptr198 %val8 = load volatile i64, ptr %ptr199 %val9 = load volatile i64, ptr %ptr200 %val10 = load volatile i64, ptr %ptr201 %val11 = load volatile i64, ptr %ptr202 %val12 = load volatile i64, ptr %ptr203 %val13 = load volatile i64, ptr %ptr204 %val14 = load volatile i64, ptr %ptr205 %val15 = load volatile i64, ptr %ptr206 207 %test = icmp ne i64 %sel, 0208 br i1 %test, label %add, label %store209 210add:211 %t0 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val0, i64 128)212 %add0 = extractvalue {i64, i1} %t0, 0213 %obit0 = extractvalue {i64, i1} %t0, 1214 %t1 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val1, i64 128)215 %add1 = extractvalue {i64, i1} %t1, 0216 %obit1 = extractvalue {i64, i1} %t1, 1217 %res1 = or i1 %obit0, %obit1218 %t2 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val2, i64 128)219 %add2 = extractvalue {i64, i1} %t2, 0220 %obit2 = extractvalue {i64, i1} %t2, 1221 %res2 = or i1 %res1, %obit2222 %t3 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val3, i64 128)223 %add3 = extractvalue {i64, i1} %t3, 0224 %obit3 = extractvalue {i64, i1} %t3, 1225 %res3 = or i1 %res2, %obit3226 %t4 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val4, i64 128)227 %add4 = extractvalue {i64, i1} %t4, 0228 %obit4 = extractvalue {i64, i1} %t4, 1229 %res4 = or i1 %res3, %obit4230 %t5 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val5, i64 128)231 %add5 = extractvalue {i64, i1} %t5, 0232 %obit5 = extractvalue {i64, i1} %t5, 1233 %res5 = or i1 %res4, %obit5234 %t6 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val6, i64 128)235 %add6 = extractvalue {i64, i1} %t6, 0236 %obit6 = extractvalue {i64, i1} %t6, 1237 %res6 = or i1 %res5, %obit6238 %t7 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val7, i64 128)239 %add7 = extractvalue {i64, i1} %t7, 0240 %obit7 = extractvalue {i64, i1} %t7, 1241 %res7 = or i1 %res6, %obit7242 %t8 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val8, i64 128)243 %add8 = extractvalue {i64, i1} %t8, 0244 %obit8 = extractvalue {i64, i1} %t8, 1245 %res8 = or i1 %res7, %obit8246 %t9 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val9, i64 128)247 %add9 = extractvalue {i64, i1} %t9, 0248 %obit9 = extractvalue {i64, i1} %t9, 1249 %res9 = or i1 %res8, %obit9250 %t10 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val10, i64 128)251 %add10 = extractvalue {i64, i1} %t10, 0252 %obit10 = extractvalue {i64, i1} %t10, 1253 %res10 = or i1 %res9, %obit10254 %t11 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val11, i64 128)255 %add11 = extractvalue {i64, i1} %t11, 0256 %obit11 = extractvalue {i64, i1} %t11, 1257 %res11 = or i1 %res10, %obit11258 %t12 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val12, i64 128)259 %add12 = extractvalue {i64, i1} %t12, 0260 %obit12 = extractvalue {i64, i1} %t12, 1261 %res12 = or i1 %res11, %obit12262 %t13 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val13, i64 128)263 %add13 = extractvalue {i64, i1} %t13, 0264 %obit13 = extractvalue {i64, i1} %t13, 1265 %res13 = or i1 %res12, %obit13266 %t14 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val14, i64 128)267 %add14 = extractvalue {i64, i1} %t14, 0268 %obit14 = extractvalue {i64, i1} %t14, 1269 %res14 = or i1 %res13, %obit14270 %t15 = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %val15, i64 128)271 %add15 = extractvalue {i64, i1} %t15, 0272 %obit15 = extractvalue {i64, i1} %t15, 1273 %res15 = or i1 %res14, %obit15274 275 br label %store276 277store:278 %new0 = phi i64 [ %val0, %entry ], [ %add0, %add ]279 %new1 = phi i64 [ %val1, %entry ], [ %add1, %add ]280 %new2 = phi i64 [ %val2, %entry ], [ %add2, %add ]281 %new3 = phi i64 [ %val3, %entry ], [ %add3, %add ]282 %new4 = phi i64 [ %val4, %entry ], [ %add4, %add ]283 %new5 = phi i64 [ %val5, %entry ], [ %add5, %add ]284 %new6 = phi i64 [ %val6, %entry ], [ %add6, %add ]285 %new7 = phi i64 [ %val7, %entry ], [ %add7, %add ]286 %new8 = phi i64 [ %val8, %entry ], [ %add8, %add ]287 %new9 = phi i64 [ %val9, %entry ], [ %add9, %add ]288 %new10 = phi i64 [ %val10, %entry ], [ %add10, %add ]289 %new11 = phi i64 [ %val11, %entry ], [ %add11, %add ]290 %new12 = phi i64 [ %val12, %entry ], [ %add12, %add ]291 %new13 = phi i64 [ %val13, %entry ], [ %add13, %add ]292 %new14 = phi i64 [ %val14, %entry ], [ %add14, %add ]293 %new15 = phi i64 [ %val15, %entry ], [ %add15, %add ]294 %res = phi i1 [ 0, %entry ], [ %res15, %add ]295 296 store volatile i64 %new0, ptr %ptr297 store volatile i64 %new1, ptr %ptr298 store volatile i64 %new2, ptr %ptr299 store volatile i64 %new3, ptr %ptr300 store volatile i64 %new4, ptr %ptr301 store volatile i64 %new5, ptr %ptr302 store volatile i64 %new6, ptr %ptr303 store volatile i64 %new7, ptr %ptr304 store volatile i64 %new8, ptr %ptr305 store volatile i64 %new9, ptr %ptr306 store volatile i64 %new10, ptr %ptr307 store volatile i64 %new11, ptr %ptr308 store volatile i64 %new12, ptr %ptr309 store volatile i64 %new13, ptr %ptr310 store volatile i64 %new14, ptr %ptr311 store volatile i64 %new15, ptr %ptr312 313 ret i1 %res314}315 316; Check using the overflow result for a branch.317define void @f12(ptr %ptr) {318; CHECK-LABEL: f12:319; CHECK: algsi 0(%r2), -1320; CHECK: jgle foo@PLT321; CHECK: br %r14322 %a = load i64, ptr %ptr323 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)324 %val = extractvalue {i64, i1} %t, 0325 %obit = extractvalue {i64, i1} %t, 1326 store i64 %val, ptr %ptr327 br i1 %obit, label %call, label %exit328 329call:330 tail call i64 @foo()331 br label %exit332 333exit:334 ret void335}336 337; ... and the same with the inverted direction.338define void @f13(ptr %ptr) {339; CHECK-LABEL: f13:340; CHECK: algsi 0(%r2), -1341; CHECK: jgnle foo@PLT342; CHECK: br %r14343 %a = load i64, ptr %ptr344 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)345 %val = extractvalue {i64, i1} %t, 0346 %obit = extractvalue {i64, i1} %t, 1347 store i64 %val, ptr %ptr348 br i1 %obit, label %exit, label %call349 350call:351 tail call i64 @foo()352 br label %exit353 354exit:355 ret void356}357 358declare {i64, i1} @llvm.usub.with.overflow.i64(i64, i64) nounwind readnone359 360