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1; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=zEC12 -verify-machineinstrs | FileCheck %s2;3; Test that early if conversion produces LOCR with operands of the right4; register classes.5 6define void @autogen_SD4739(ptr) {7; CHECK-NOT: Expected a GR32Bit register, but got a GRX32Bit register8BB:9 %L34 = load i8, ptr %010 %Cmp56 = icmp sgt i8 undef, %L3411 br label %CF24612 13CF246: ; preds = %CF246, %BB14 %Sl163 = select i1 %Cmp56, i8 %L34, i8 undef15 br i1 undef, label %CF246, label %CF24816 17CF248: ; preds = %CF248, %CF24618 store i8 %Sl163, ptr %019 br label %CF24820}21