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1# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z15 -O3 -start-before=finalize-isel %s -o - \2# RUN: -verify-machineinstrs | FileCheck %s3#4# Test that the exrl used for the remainder of a memset (after xc loop) is5# not rescheduled incorrectly in a way that interfers with CC liveness.6 7--- |8 define void @fun(ptr %Src, ptr %Dst, i64 %Len) { ret void }9...10 11# CHECK-LABEL: fun:12 13# CHECK: exrl %r4, .Ltmp014# CHECK-NEXT: cgije15 16# CHECK: exrl %r4, .Ltmp117# CHECK-NEXT: tmll18# CHECK-NEXT: jne19 20# CHECK: .Ltmp1:21# CHECK-NEXT: xc 0(1,%r3), 0(%r2)22# CHECK-NEXT: .Ltmp0:23# CHECK-NEXT: xc 0(1,%r14), 0(%r14)24---25name: fun26alignment: 1627tracksRegLiveness: true28registers:29 - { id: 0, class: grx32bit }30 - { id: 1, class: addr64bit }31 - { id: 2, class: addr64bit }32 - { id: 3, class: gr64bit }33 - { id: 4, class: gr64bit }34 - { id: 5, class: grx32bit }35 - { id: 6, class: addr64bit }36 - { id: 7, class: addr64bit }37 - { id: 8, class: gr64bit }38 - { id: 9, class: gr128bit }39 - { id: 10, class: gr64bit }40 - { id: 11, class: gr32bit }41 - { id: 12, class: gr32bit }42 - { id: 13, class: gr32bit }43 - { id: 14, class: addr64bit }44 - { id: 15, class: gr64bit }45 - { id: 16, class: gr64bit }46 - { id: 17, class: addr64bit }47 - { id: 18, class: gr64bit }48 - { id: 19, class: vr128bit }49liveins:50 - { reg: '$r2d', virtual-reg: '%1' }51 - { reg: '$r3d', virtual-reg: '%2' }52 - { reg: '$r4d', virtual-reg: '%3' }53frameInfo:54 maxAlignment: 155machineFunctionInfo: {}56jumpTable:57 kind: block-address58 entries:59 - id: 060 blocks: [ '%bb.1', '%bb.2', '%bb.5', '%bb.6', '%bb.7', '%bb.7', 61 '%bb.7', '%bb.7', '%bb.7', '%bb.7', '%bb.7', '%bb.7', 62 '%bb.2', '%bb.5', '%bb.6', '%bb.7', '%bb.1', '%bb.2', 63 '%bb.7', '%bb.7', '%bb.5' ]64body: |65 bb.0:66 liveins: $r2d, $r3d, $r4d67 68 %3:gr64bit = COPY $r4d69 %2:addr64bit = COPY $r3d70 %1:addr64bit = COPY $r2d71 %4:gr64bit = LGHI 072 73 bb.8:74 successors: %bb.1(0x00000000), %bb.2(0x00000000), %bb.5(0x00000000), %bb.6(0x00000000), %bb.7(0x80000000)75 76 %6:addr64bit = SLLG %4, $noreg, 377 %7:addr64bit = LARL %jump-table.078 BI killed %6, 0, killed %7 :: (load (s64) from jump-table)79 80 bb.1:81 successors: 82 83 84 bb.2:85 successors: %bb.4(0x30000000), %bb.3(0x50000000)86 87 %8:gr64bit = LG %1, 0, $noreg88 %9:gr128bit = FLOGR killed %8, implicit-def dead $cc89 %10:gr64bit = COPY %9.subreg_h6490 %11:gr32bit = COPY %10.subreg_l3291 %12:gr32bit = LHIMux 6492 %13:gr32bit = nuw nsw SRK killed %12, killed %11, implicit-def dead $cc93 %0:grx32bit = COPY %1394 %14:addr64bit = AGHIK %3, -1, implicit-def dead $cc95 XCReg %1, 0, %1, 0, %14, implicit-def dead $cc96 XCReg %2, 0, %1, 0, %14, implicit-def dead $cc97 TMLMux %13, 7, implicit-def $cc98 BRC 15, 8, %bb.4, implicit $cc99 J %bb.3100 101 bb.3:102 successors: 103 104 %16:gr64bit = IMPLICIT_DEF105 %15:gr64bit = INSERT_SUBREG %16, %0, %subreg.subreg_l32106 %18:gr64bit = IMPLICIT_DEF107 %17:addr64bit = RISBGN %18, killed %15, 54, 185, 3108 %19:vr128bit = VGBM 0109 VST killed %19, killed %17, 16, $noreg110 111 bb.4:112 successors: 113 114 115 bb.5:116 successors: 117 118 119 bb.6:120 successors: 121 122 123 bb.7:124 Return125 126...127