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1; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 -prefetch-distance=50 \2; RUN: -loop-prefetch-writes -stop-after=loop-data-prefetch | FileCheck %s3;4; Check that prefetches are emitted in a position that is executed each5; iteration for each targeted memory instruction. The two stores in %true and6; %false are within one cache line in memory, so they should get a single7; prefetch in %for.body.8;9; CHECK-LABEL: for.body10; CHECK: call void @llvm.prefetch.p0(ptr {{.*}}, i32 011; CHECK: call void @llvm.prefetch.p0(ptr {{.*}}, i32 112; CHECK-LABEL: true13; CHECK-LABEL: false14; CHECK-LABEL: latch15 16define void @fun(ptr nocapture %Src, ptr nocapture readonly %Dst) {17entry:18 br label %for.body19 20for.body:21 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next.9, %latch ]22 %arrayidx = getelementptr inbounds i32, ptr %Dst, i64 %indvars.iv23 %0 = load i32, ptr %arrayidx, align 424 %cmp = icmp sgt i32 %0, 025 br i1 %cmp, label %true, label %false26 27true: 28 %arrayidx2 = getelementptr inbounds i32, ptr %Src, i64 %indvars.iv29 store i32 %0, ptr %arrayidx2, align 430 br label %latch31 32false:33 %a = add i64 %indvars.iv, 834 %arrayidx3 = getelementptr inbounds i32, ptr %Src, i64 %a35 store i32 %0, ptr %arrayidx3, align 436 br label %latch37 38latch:39 %indvars.iv.next.9 = add nuw nsw i64 %indvars.iv, 160040 %cmp.9 = icmp ult i64 %indvars.iv.next.9, 1120041 br i1 %cmp.9, label %for.body, label %for.cond.cleanup42 43for.cond.cleanup:44 ret void45}46 47