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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple s390x-ibm-linux -mcpu=z13 -systemz-subreg-liveness -verify-machineinstrs -start-before register-coalescer -stop-after greedy -o - %s | FileCheck %s3 4# Check that when we split the live-range with several active lanes5# as part of the live-range update, we correctly eliminate the VNI from6# the relevant part.7#8# In this specific test, the register coalescer will:9# 1. Merge %0 with %1, creating a live-range for the full value subreg_l32 + subreg_h3210# (actually %0 gets merge with %1 via rematerialization, and technically %0 and %111# remain two different live-ranges.)12# 2. Merge %2 with %1 triggering a split into the subreg_l32 + subreg_h32 ranges, since13# %2 only touches subreg_l32. As part of the split the subrange covering subreg_h3214# must contain only the VNI for the high part (i.e., the one tied with the remaaat of %0).15# This used to be broken and trigger a machine verifier error, because we were not16# clearing the dead value w.r.t. lanes when doing the splitting. I.e., we were ending17# with a subrange referring a value that did not define that lane.18#19# PR4083520---21name: main22tracksRegLiveness: true23body: |24 bb.0:25 26 ; CHECK-LABEL: name: main27 ; CHECK: [[LGHI:%[0-9]+]]:gr64bit = LGHI 4328 ; CHECK-NEXT: [[LGHI1:%[0-9]+]]:gr64bit = LGHI 4329 ; CHECK-NEXT: undef [[LGHI1:%[0-9]+]].subreg_l32:gr64bit = MSR [[LGHI1]].subreg_l32, [[LGHI1]].subreg_l3230 ; CHECK-NEXT: [[LGHI1:%[0-9]+]].subreg_l32:gr64bit = AHIMux [[LGHI1]].subreg_l32, 9, implicit-def dead $cc31 ; CHECK-NEXT: undef [[LGFI:%[0-9]+]].subreg_l64:gr128bit = LGFI -245143785, implicit [[LGHI1]].subreg_l3232 ; CHECK-NEXT: [[LGFI:%[0-9]+]]:gr128bit = DLGR [[LGFI]], [[LGHI]]33 ; CHECK-NEXT: Return implicit [[LGFI]]34 %0:gr64bit = LGHI 4335 %1:gr32bit = COPY %0.subreg_l3236 %1:gr32bit = MSR %1, %137 %2:gr32bit = COPY killed %138 %2:gr32bit = AHIMux killed %2, 9, implicit-def dead $cc39 undef %3.subreg_l64:gr128bit = LGFI -245143785, implicit killed %240 %3:gr128bit = DLGR %3:gr128bit, killed %041 Return implicit killed %342 43...44 45# Make sure the compiler does not choke on VNIs that don't46# an explicit MI as definition.47# In that specific example, this is the PHI not explicitly48# represented for the value carried by %7.49---50name: segfault51tracksRegLiveness: true52frameInfo:53 adjustsStack: true54liveins: []55body: |56 ; CHECK-LABEL: name: segfault57 ; CHECK: bb.0:58 ; CHECK-NEXT: successors: %bb.1(0x80000000)59 ; CHECK-NEXT: {{ $}}60 ; CHECK-NEXT: [[LGHI:%[0-9]+]]:addr64bit = LGHI 061 ; CHECK-NEXT: {{ $}}62 ; CHECK-NEXT: bb.1:63 ; CHECK-NEXT: successors: %bb.1(0x80000000)64 ; CHECK-NEXT: {{ $}}65 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 066 ; CHECK-NEXT: [[LGFR:%[0-9]+]]:gr64bit = LGFR [[LGHI]].subreg_l3267 ; CHECK-NEXT: $r2d = LGHI 12368 ; CHECK-NEXT: $r3d = LGHI 069 ; CHECK-NEXT: $r4d = LGHI 070 ; CHECK-NEXT: $r5d = COPY [[LGFR]]71 ; CHECK-NEXT: KILL killed $r2d, killed $r3d, killed $r4d, $r5d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc72 ; CHECK-NEXT: ADJCALLSTACKUP 0, 073 ; CHECK-NEXT: [[LGHI:%[0-9]+]]:addr64bit = nuw nsw LA [[LGHI]], 1, $noreg74 ; CHECK-NEXT: J %bb.175 bb.0:76 successors: %bb.1(0x80000000)77 78 %2:gr64bit = LGHI 079 %5:gr64bit = LGHI 12380 %7:addr64bit = COPY %281 82 bb.1:83 successors: %bb.1(0x80000000)84 85 %0:addr64bit = COPY killed %786 ADJCALLSTACKDOWN 0, 087 %3:gr32bit = COPY %0.subreg_l3288 %4:gr64bit = LGFR killed %389 $r2d = COPY %590 $r3d = COPY %291 $r4d = COPY %292 $r5d = COPY killed %493 KILL killed $r2d, killed $r3d, killed $r4d, killed $r5d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc94 ADJCALLSTACKUP 0, 095 %1:gr64bit = nuw nsw LA killed %0, 1, $noreg96 %7:addr64bit = COPY killed %197 J %bb.198 99...100