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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; Test use of RISBG vs RISBGN on zEC12.3;4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=zEC12 | FileCheck %s5 6; On zEC12, we generally prefer RISBGN.7define i64 @f1(i64 %a, i64 %b) {8; CHECK-LABEL: f1:9; CHECK: # %bb.0:10; CHECK-NEXT: risbgn %r2, %r3, 60, 62, 011; CHECK-NEXT: br %r1412 %anda = and i64 %a, -1513 %andb = and i64 %b, 1414 %or = or i64 %anda, %andb15 ret i64 %or16}17 18; But we may fall back to RISBG if we can use the condition code.19define i64 @f2(i64 %a, i64 %b, ptr %c) {20; CHECK-LABEL: f2:21; CHECK: # %bb.0:22; CHECK-NEXT: risbg %r2, %r3, 60, 62, 023; CHECK-NEXT: ipm %r024; CHECK-NEXT: risblg %r0, %r0, 31, 159, 3525; CHECK-NEXT: st %r0, 0(%r4)26; CHECK-NEXT: br %r1427 %anda = and i64 %a, -1528 %andb = and i64 %b, 1429 %or = or i64 %anda, %andb30 %cmp = icmp sgt i64 %or, 031 %conv = zext i1 %cmp to i3232 store i32 %conv, ptr %c, align 433 ret i64 %or34}35 36