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1; Test sequences that can use ROSBG.2;3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s4 5; Test the simple case.6define i32 @f1(i32 %a, i32 %b) {7; CHECK-LABEL: f1:8; CHECK: rosbg %r2, %r3, 59, 59, 09; CHECK: br %r1410 %andb = and i32 %b, 1611 %or = or i32 %a, %andb12 ret i32 %or13}14 15; ...and again with i64.16define i64 @f2(i64 %a, i64 %b) {17; CHECK-LABEL: f2:18; CHECK: rosbg %r2, %r3, 59, 59, 019; CHECK: br %r1420 %andb = and i64 %b, 1621 %or = or i64 %a, %andb22 ret i64 %or23}24 25; Test a case where wraparound is needed.26define i32 @f3(i32 %a, i32 %b) {27; CHECK-LABEL: f3:28; CHECK: rosbg %r2, %r3, 63, 60, 029; CHECK: br %r1430 %andb = and i32 %b, -731 %or = or i32 %a, %andb32 ret i32 %or33}34 35; ...and again with i64.36define i64 @f4(i64 %a, i64 %b) {37; CHECK-LABEL: f4:38; CHECK: rosbg %r2, %r3, 63, 60, 039; CHECK: br %r1440 %andb = and i64 %b, -741 %or = or i64 %a, %andb42 ret i64 %or43}44 45; Test a case with just a shift.46define i32 @f6(i32 %a, i32 %b) {47; CHECK-LABEL: f6:48; CHECK: rosbg %r2, %r3, 32, 51, 1249; CHECK: br %r1450 %shrb = shl i32 %b, 1251 %or = or i32 %a, %shrb52 ret i32 %or53}54 55; ...and again with i64.56define i64 @f7(i64 %a, i64 %b) {57; CHECK-LABEL: f7:58; CHECK: rosbg %r2, %r3, 0, 51, 1259; CHECK: br %r1460 %shrb = shl i64 %b, 1261 %or = or i64 %a, %shrb62 ret i64 %or63}64 65; Test a case with just a rotate. This can't use ROSBG.66define i32 @f8(i32 %a, i32 %b) {67; CHECK-LABEL: f8:68; CHECK: rll {{%r[0-5]}}69; CHECK: or {{%r[0-5]}}70; CHECK: br %r1471 %shlb = shl i32 %b, 3072 %shrb = lshr i32 %b, 273 %rotlb = or i32 %shlb, %shrb74 %or = or i32 %a, %rotlb75 ret i32 %or76}77 78; ...and again with i64, which can.79define i64 @f9(i64 %a, i64 %b) {80; CHECK-LABEL: f9:81; CHECK: rosbg %r2, %r3, 0, 63, 4782; CHECK: br %r1483 %shlb = shl i64 %b, 4784 %shrb = lshr i64 %b, 1785 %rotlb = or i64 %shlb, %shrb86 %or = or i64 %a, %rotlb87 ret i64 %or88}89 90; Test a case with a shift and AND.91define i32 @f10(i32 %a, i32 %b) {92; CHECK-LABEL: f10:93; CHECK: rosbg %r2, %r3, 56, 59, 494; CHECK: br %r1495 %shrb = shl i32 %b, 496 %andb = and i32 %shrb, 24097 %or = or i32 %a, %andb98 ret i32 %or99}100 101; ...and again with i64.102define i64 @f11(i64 %a, i64 %b) {103; CHECK-LABEL: f11:104; CHECK: rosbg %r2, %r3, 56, 59, 4105; CHECK: br %r14106 %shrb = shl i64 %b, 4107 %andb = and i64 %shrb, 240108 %or = or i64 %a, %andb109 ret i64 %or110}111 112; Check the handling of zext and OR, which can use ROSBG.113define i64 @f12(i64 %a, i32 %b) {114; CHECK-LABEL: f12:115; CHECK: rosbg %r2, %r3, 32, 63, 0116; CHECK: br %r14117 %add = add i32 %b, 1118 %ext = zext i32 %add to i64119 %or = or i64 %a, %ext120 ret i64 %or121}122