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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; Test 32-bit shifts left.3;4; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s5 6; Check the low end of the SLL range.7define i32 @f1(i32 %a) {8; CHECK-LABEL: f1:9; CHECK: # %bb.0:10; CHECK-NEXT: sll %r2, 111; CHECK-NEXT: br %r1412 %shift = shl i32 %a, 113 ret i32 %shift14}15 16; Check the high end of the defined SLL range.17define i32 @f2(i32 %a) {18; CHECK-LABEL: f2:19; CHECK: # %bb.0:20; CHECK-NEXT: sll %r2, 3121; CHECK-NEXT: br %r1422 %shift = shl i32 %a, 3123 ret i32 %shift24}25 26; We don't generate shifts by out-of-range values.27define i32 @f3(i32 %a) {28; CHECK-LABEL: f3:29; CHECK: # %bb.0:30; CHECK-NEXT: br %r1431 %shift = shl i32 %a, 3232 ret i32 %shift33}34 35; Make sure that we don't generate negative shift amounts.36define i32 @f4(i32 %a, i32 %amt) {37; CHECK-LABEL: f4:38; CHECK: # %bb.0:39; CHECK-NEXT: ahi %r3, -140; CHECK-NEXT: sll %r2, 0(%r3)41; CHECK-NEXT: br %r1442 %sub = sub i32 %amt, 143 %shift = shl i32 %a, %sub44 ret i32 %shift45}46 47; Check variable shifts.48define i32 @f5(i32 %a, i32 %amt) {49; CHECK-LABEL: f5:50; CHECK: # %bb.0:51; CHECK-NEXT: sll %r2, 0(%r3)52; CHECK-NEXT: br %r1453 %shift = shl i32 %a, %amt54 ret i32 %shift55}56 57; Check shift amounts that have a constant term.58define i32 @f6(i32 %a, i32 %amt) {59; CHECK-LABEL: f6:60; CHECK: # %bb.0:61; CHECK-NEXT: sll %r2, 10(%r3)62; CHECK-NEXT: br %r1463 %add = add i32 %amt, 1064 %shift = shl i32 %a, %add65 ret i32 %shift66}67 68; ...and again with a truncated 64-bit shift amount.69define i32 @f7(i32 %a, i64 %amt) {70; CHECK-LABEL: f7:71; CHECK: # %bb.0:72; CHECK-NEXT: sll %r2, 10(%r3)73; CHECK-NEXT: br %r1474 %add = add i64 %amt, 1075 %trunc = trunc i64 %add to i3276 %shift = shl i32 %a, %trunc77 ret i32 %shift78}79 80; Check shift amounts that have the largest in-range constant term. We could81; mask the amount instead.82define i32 @f8(i32 %a, i32 %amt) {83; CHECK-LABEL: f8:84; CHECK: # %bb.0:85; CHECK-NEXT: sll %r2, 4095(%r3)86; CHECK-NEXT: br %r1487 %add = add i32 %amt, 409588 %shift = shl i32 %a, %add89 ret i32 %shift90}91 92; Check the next value up. Again, we could mask the amount instead.93define i32 @f9(i32 %a, i32 %amt) {94; CHECK-LABEL: f9:95; CHECK: # %bb.0:96; CHECK-NEXT: ahi %r3, 409697; CHECK-NEXT: sll %r2, 0(%r3)98; CHECK-NEXT: br %r1499 %add = add i32 %amt, 4096100 %shift = shl i32 %a, %add101 ret i32 %shift102}103 104; Check that we don't try to generate "indexed" shifts.105define i32 @f10(i32 %a, i32 %b, i32 %c) {106; CHECK-LABEL: f10:107; CHECK: # %bb.0:108; CHECK-NEXT: ar %r3, %r4109; CHECK-NEXT: sll %r2, 0(%r3)110; CHECK-NEXT: br %r14111 %add = add i32 %b, %c112 %shift = shl i32 %a, %add113 ret i32 %shift114}115 116; Check that the shift amount uses an address register. It cannot be in %r0.117define i32 @f11(i32 %a, ptr %ptr) {118; CHECK-LABEL: f11:119; CHECK: # %bb.0:120; CHECK-NEXT: l %r1, 0(%r3)121; CHECK-NEXT: sll %r2, 0(%r1)122; CHECK-NEXT: br %r14123 %amt = load i32, ptr %ptr124 %shift = shl i32 %a, %amt125 ret i32 %shift126}127